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Doubt in SIC bit using on-chip I2C of LPC2148

While sending the data through on-chip I2C of LPC2148, we like to know the significance of clearing the SIC bit (I2C0CONCLR=0x08)for each transaction (address,data,stop)even though we are not using the interrupt.

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  • You should be able to use whatever timers/clocks you want to mark time. People often use timers (SysTick) to generate 1 ms (1KHz) interrupts, and mark time off that way. These timers tend to require that the processor is running, and consume more power. Low frequency clocks like the 32.768 KHz tend to be run in low power portions of the design, and in backup power domains. This would allow the processor to stop, while the RTC keeps ticking, and it can waken the processor on second or alarm intervals.

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  • You should be able to use whatever timers/clocks you want to mark time. People often use timers (SysTick) to generate 1 ms (1KHz) interrupts, and mark time off that way. These timers tend to require that the processor is running, and consume more power. Low frequency clocks like the 32.768 KHz tend to be run in low power portions of the design, and in backup power domains. This would allow the processor to stop, while the RTC keeps ticking, and it can waken the processor on second or alarm intervals.

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