Hello,
i am using a Cortex M0 which has 24MhZ Flash and 48MhZ Core speed with await state in case Flash is too low.
I want to execute my ISR from SRAm to improve speed a bit.
In the scatter file i implemented the following:
SRAM_Execution 0x20001000 0x1000 { stm32f0xx_isr.o }
When i click on compile the map file says that the functions are placed in SRAM. Also som Vemeers are added.
Unfortunately the machine does not work when adding this to the scatter file
What am i missing? I though that the call of main() will copy the functions from Flash to SRAM before starting the application.
Check the documentation for your unspecified "Cortex M0" chip very carefully: the chip may well be optimised to run from Flash - running from RAM might actually turn out to be slower!
The STM32F0 has 3x 32-bit words prefetching, figure 3-6 instructions
On the STM32F072B, place the RAM based code from stm32f0xx.c into the Load Region, so the scatter loader gets it copied into RAM at start up.
LR_IROM1 0x08000000 0x00020000 { ; load region size_region ER_IROM1 0x08000000 0x00020000 { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } RW_IRAM1 0x200000C0 0x00001F40 { ; RW data (first 0xC0 for vectors) .ANY (+RW +ZI) } IRQ_IRAM1 0x20002000 0x00002000 { stm32f0xx_it.o } }
If the IRQ routines are in RAM, surely the Vector Table should be place there too?
int main(void) { int i; uint32_t *p = (uint32_t *)0x20000000; // Base of RAM (0xC0 carved out in scatter file) uint32_t *q = (uint32_t *)0x80000000; // Base of FLASH /* Relocate by software the vector table to the internal SRAM at 0x20000000 ***/ /* Copy the vector table from the Flash (mapped at the base of the application load address 0x08000000) to the base address of the SRAM at 0x20000000. */ for(i=0; i<48; i++) *p++ = *q++; /* Enable the SYSCFG peripheral clock*/ RCC_APB2PeriphResetCmd(RCC_APB2Periph_SYSCFG, ENABLE); /* Remap SRAM at 0x00000000 */ SYSCFG_MemoryRemapConfig(SYSCFG_MemoryRemap_SRAM); // ... while(1); }
Veneers suggest that the code in the IRQ routines is calling stuff in ROM, killing a lot of the speed opportunities?
No processor mentioned - but not all processors can run from RAM. Or some can only run from some RAM address ranges.
Observe that processor make is called out in object file name by OP
Should have read: uint32_t *q = (uint32_t *)0x08000000; // Base of FLASH