I am using 8051F120 having 127KB Program memory, theoretically. I have written 4 *.C files residing in each bank. The length of the code in Bank1 and Bank2 is less than 32KB (observing the list file). But, instead of this, the linker gives an address space overflow for both the banks. Kindly assist.
Dhaval Solanki
But, in my opinion, there should be a document produced by the chip vendor stating this. well, SILabs does
The Keil documentation relating to banking is reasonably good and: but is somewhat invalid for the SILabs (and other?) chips with "internal banking"
go by the SILabs appnote, it is crystal clear
Erik
I'll take your word for it :)