What does really hapen when interrupt occour? The microcontroller starts from address 0x00 in flash memory but why the flash ORIGIN = 0x8000000? The interrupt vectors are also put in address 0x800..00 How is it happened that when interrupt occours the programm should jumps to adres 0x00+offset for interrupt for example IRQ1 (I thing) it jumps to the moved address 0x800.0+offset for IRQ1?
I probably wrote it a bit nutty but i hope You Know what I mean? In other words why we put our programms at address starting from 0x800000 in spite of the programm jumps to address 0x000 after reset.
I think you are missing the fact that flash memory is located at address 0x00000000 as well as at 0x08000000. This is called mapping. In a STM32, you can choose what to map to address 0: flash or RAM.
So when the reset occours the program should jump to address 0x00 but really it jumps to 0x08000000. In STM32 there is a register called VTOR in SCB. Do we allways have to put the real vector's address? What I mean is, do we have to allways put to VTOR a 0x08000000? I saw some programmes that did not set the VTOR, the Flash origin was 0x08000000 and it worked. Is it possible? I do not understand what really happens when interrupts occour? Where it is known where to jump, to 0x08000000 or to 0x00000000?
Apparently, you still cannot grasp the concept of memory mapping. The same memory (on-chip flash) is mapped at two locations: 0x08000000 and 0x00000000. You could say that there is a mirror image of flash at address 0.
So when the reset occours the program should jump to address 0x00 but really it jumps to 0x08000000.
Strictly speaking, it doesn't jump there. It fetches the vector address and jumps to it. It fetches it from address 0, but the result is the same as if it fetched it from address 0x08000000 due to mirroring (see above.)
In STM32 there is a register called VTOR in SCB. Do we allways have to put the real vector's address? What I mean is, do we have to allways put to VTOR a 0x08000000?
It does not matter. It can be either 0 or 0x08000000. Vector fetches by the CPU will yield the same result. It would help if you new how physical memory worked. There is the address bus and the data bus. The CPU issues an address on the address bus and accesses the memory on the data bus. Actually, that's how it really works inside the chip. Then it would be obvious to you that the same memory locations could be accessed via many different (mirrored) address ranges.
I think I know what You mean. Yesterday I red reference Manual RM0008 and Programming Manual PM0056 and I do not know why but it should be written about it there but I couldn't find it? The only thing I found was what to do if we use XL-denisty device and Bank 2 of flash memory on page 61 in RM008. Everything You say make sense and I'm wondering where You know it from?
Please tell me one more thing. Are all the registers R0-R12 part of core or they reside in SRAM? I am asking because on one Figure in datasheet I saw that these registers are located in SRAM.
Everything You say make sense and I'm wondering where You know it from?
These are the basics of digital electronics. Where do you learn those? Some people do it at school, others educate themselves.
Are all the registers R0-R12 part of core or they reside in SRAM?
These registers are located inside the CPU. I wonder what difference it makes to you?
I belong to those who learn by himsef or try to ask other people knowing more then me.
No difference. I was only amazed because I saw those registers in SRAM space.
I've just seen something strange for me. Microcontrollers with Cortex-M3 from NXP don't have such memory mapping as STM32. So, I suppose it does not depend on architecture but on industry.