STM32 read / write: external memory interface

Hi,

I'm working with the STM32F103ZET6 processor and I want to talk to another device connected to the external memory interface (device: ICS2008B). At the moment I'm not able to talk to the ICS2008B. Maybe there's something wrong in my init-code? At the NWE pin is no activity at all. The correct NCS goes low.

#define Bank1_SRAM3_ADDR    ((unsigned int)0x68000000)
volatile unsigned char *addr __attribute__((at(Bank1_SRAM3_ADDR)));

void testfunction(void)
{
unsigned char progreg = 0x01;
unsigned char uartstatreg = 0x00;

SRAM_INIT();

//write access didn't work -> HardFault_Handler will be called
*(unsigned int*)addr = progreg;

//read access
uartstatreg = *(unsigned char*)addr;

}


void SRAM_INIT(void)
{
        FSMC_NORSRAMInitTypeDef  FSMC_NORSRAMInitStructure;
        FSMC_NORSRAMTimingInitTypeDef  p;

        RCC->AHBENR |= RCC_AHBPeriph_FSMC;
        RCC->APB2ENR |= (RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOG | RCC_APB2Periph_GPIOE |
                                        RCC_APB2Periph_GPIOF) ;

        GPIO_Init(GPIOD, GPIO_Mode_AF_PP, (GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_8 | GPIO_Pin_9 |
                                GPIO_Pin_10 | GPIO_Pin_14 | GPIO_Pin_15));

        GPIO_Init(GPIOD, GPIO_Mode_AF_PP, (GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10
| GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15));

        GPIO_Init(GPIOF, GPIO_Mode_AF_PP, (     GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15));

        GPIO_Init(GPIOG, GPIO_Mode_AF_PP, (GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3
|GPIO_Pin_4 | GPIO_Pin_5));


        GPIO_Init(GPIOD, GPIO_Mode_AF_PP, (GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13));
        GPIO_Init(GPIOD, GPIO_Mode_AF_PP, (GPIO_Pin_4 |GPIO_Pin_5));
        GPIO_Init(GPIOG, GPIO_Mode_AF_PP, (GPIO_Pin_10));
        GPIO_Init(GPIOE, GPIO_Mode_AF_PP, (GPIO_Pin_0 | GPIO_Pin_1));

        p.FSMC_AddressSetupTime = 3;
  p.FSMC_AddressHoldTime = 0;
  p.FSMC_DataSetupTime = 2;
  p.FSMC_BusTurnAroundDuration = 0;
  p.FSMC_CLKDivision = 0;
  p.FSMC_DataLatency = 0;
  p.FSMC_AccessMode = FSMC_AccessMode_A;

  FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3;
  FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
  FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
  FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_8b;
  FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
  FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
  FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
  FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
  FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
  FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
  FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
  FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
  FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
  FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
  FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;


        FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);

        /*!< Enable FSMC Bank1_SRAM Bank */
        //FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE);
        FSMC_Bank1->BTCR[FSMC_Bank1_NORSRAM3] |= BCR_MBKEN_Set;
}

best regards
Jens