Hello, anyone has experience with spartan 3e board kit board? I do not get results with any program that contains: DJNZ, JMP ... results alone with programs in which I interact, if I let a program with a simple increase with subsequent visualization with LEDs, do not get any result, only the first LED lighting. Alguin can help-me?
Health and thanks
Have you contacted the IP provider?
Have you verified that your code actually works in a Real 8051? Or in the Keil Simulator?
Hello,
I questioned on the forum but so far no response. The Keil simulator does not fail, but do not get a good result in programs that have to act for themselves, for example:
mov p3,#01h mov r1,#00h inici: mov p3, r1 inc r1 jmp inici end
This program is so simple I hung with a 02h in the P3 and not with that increase. In Canvio those in need of my interaction there is no problem. for example: inici: mov p3,p1 jmp inici end
He believed that there could be a problem of the clock, but do not be.
So what result, exactly, do you get??
Please pay attention to the instructions for posting source code: www.danlhenry.com/.../keil_code.png
"programs that have to act for themselves"
What, exactly, do you mean by that? Surely, it is in the nature of any program that it should "act" for "itself"??
Where did you get your "Spartan 3e" board? Can't your supplier provide assistance?
Are you experienced in FPGA design and/or microcontroller proramming?
This program is so simple that it is missing the "org 0"
Erik
Hello, I am a student final project is to implement a career 8051 ip core in 3e Spanta. L'experience I have with the FPGA is two subjects. The problem I have is that once implemented the IP core is not operating with a loop without user interaction, example:
Org 0 Inici: mov p3,#01h Mov r0,#0ffh Mov r1,#0ffh Temp1: Djnz r1, temp1 Temp2: djnz r0,temp2 Mov p3,#02h Mov r2,#0ffh Mov r3,#0ffh Temp3 : djnz r2, temp3 Temp4 : djnz r3, temp4 Jmp inici end
The P3 is the output of LEDs that have the plate, the response of the plate is a 1 in the leds i mas.No be nothing if not accept a DJNZ, JMP ... But if I do a program
mov p3, p1 P1 is the input buttons, if I get a loop in which I can go play.
Health i thank you for the help
The P3 is the output of LEDs that have the plate, the response of the plate is a 1 in the leds i mas.No be nothing if not accept a DJNZ, JMP ... I think the above frenglish sentence translates to "P3 pins read '1'". p3.2 - p3.7 should be a '1', p3.0 - p3.1 should oscillate very fast (too fast for a LED which will just appear lit).
are you measuring with a scope or a meter or - are you relying on the LEDs?
not related to your problem, but your code is "overcomplicated"
Org 0 Inici: mov p3,#01h Temp1: djnz r0, temp1 Temp2: djnz r0,temp2 Mov p3,#02h Temp3 : djnz r0, temp3 Temp4 : djnz r0, temp4 Jmp inici end
will do the exact same
I tried the program and does the same, stays the P3.0 i will not turn on the P3.1 at any time. Do not know if the problem is related to the djnz, the IP core that may need to configure depends instructions.
I tried the program and does the same of, course, I said so
hello, I do not understand the question?
are you measuring with a scope oro en meter oro - are you relying on the LEDs?
you mean as I see it only P3.0 LED lights? I say looking at it with the eye,
He mean: Try with an oscilloscope.
Your eyes cannot see the LED blinking, it's blinking too fast!
Hi, I understand that I comenteis eye can not see whether or not the lights P3.1, but I understand that this program the two would have to see leds on / off alike, no? i even look at the oscilloscope. Thanks for your time
... I think it would be advisable for you to get experience with a well documented debuggable case like a SILabs devboard before tackling the IP cores with their idiosynchracies.
now having the background to say "It MUST be so" makes it impossible for you to decicevely determine if it is a "core idiosynchracy" or your code.
As far as your actual problem it could be a spartan IP idiosynchracy such as the pins in question having a dedicated purpose a pin configuration register the port bit routed differently ....
all beyond "normal behaviour" but quite typical for IP cores
erik: have you checked T1's maximum clock rate lately?
The troll took a long sleep.