Issue regarding accessing XRAM in DS89C430

Sorry, I have been through the app notes on "">www.maxim-ic.com/.../4833"
and got the solution. Simply adding following instruction on controller initilization function will help working:

PMR = PMR | 0x01; // Allow Internal SRAM access

Thanks for your previous comments.

In your firsr post, you said, "I ... followed the instruction under forum "http://www.keil.com/support/docs/3345.htm "

One of the instructions on that page was to include this code:

                               ; enable on-chip xdata RAM
          ORL PMR,#1           ; PMR.DME0 = 1 (set to 1 to enable SRAM)

Now you say, "Simply adding following instruction on controller initilization function will help working:"

PMR = PMR | 0x01; // Allow Internal SRAM access

But that has exactly the same effect as the assembler code that you said you had already included!

Also, it is highly questionable to do this in 'C' - as the change will not have been in effect during the execution of the startup code!

I added the file first "startup.a51" but didn't work it might be due to 'startup.a51' from Dallas folder doesn't included "ORL PMR,#1" [I am using keil 7.20 c compiler version].
At the same time AN4833 page 73 includes
"To enable the 1kB SRAM as internal data memory, software must set the DME0 bit (PMR.0). After setting this bit, all MOVX accesses within the first 1kB (0000h–03FFh) are directed to the internal SRAM."

Please correct me in above.

Also suggest me link to get startup.a51 if is older version i have for Dallas.

But the link _you_ posted did contain the information how _you_ should modify your startup file to make it work. Did _you_ make that change to your startup file?

I did not made correction in startup.a51....!!!!
Shell i include the code "ORL PMR,#1". Will try this....

I did not made correction in startup.a51....!!!!
Shell i include the code "ORL PMR,#1".

GENERAL for ALL chips with internal XRAM etc:
ALSO: for chips with external XRAM where the timings must be changed.

Unless the defaults ("reset states") of the SFR(s) as stated in the datasheet, are what you want you MUST make a local, renamed copy of startup.a51 and include it in your build. In that copy you must at the beginning set all SFRs that affect XRAM addressing.

Not mandatory, but I prefer to, in the same place, to include, if applicable, port configuration, oscillator configuration and other configuration bits affecting the actual functionality if the chip.

Erik

I did not made correction in startup.a51....!!!!

So you lied to all of us when earlier you claimed you had followed the instructions from that Keil app note.

From where I sit, the frustration you had from not getting that thing to work is insufficient penance for that lie.

Shall you include that line of code?

But _you_ linked to a document that did say:

Add STARTUP.A51 to your project. To do this, copy the file \C51\LIB\STARTUP.A51 to your project
folder and add it to the project. Then, in the STARTUP.A51 file, enable the on-chip SRAM by
setting bit 0 (DME0) in the PMR SFR. The following lines in STARTUP.A51 will do this:
...

So the document _you_ said you had followed did say what steps you should do. And you don't get it to work and ask us if you should have followed the steps in the linked document. How where you thinking?

"make a local, renamed copy of startup.a51"

Renaming it is a preference - not mandatory.

Having it local is also a preference (and one that I'd share) - not mandatory.

"at the beginning set all SFRs that affect XRAM addressing"

It doesn't have to be at the beginning - it just needs to be before any XRAM reference that requires it.

Of course, having it at the beginning does guarantee that - but it is not mandatory.