• State Not Answered
  • Locked Locked
  • Replies 23 replies
  • Subscribers 21 subscribers
  • Views 2672 views
  • Users 0 members are here
2025 survey

We are running a survey to help us improve the experience for all of our members. If you see the survey appear, please take the time to tell us about your experience if you can.

Options
Related
How was your experience today?
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Optimization Assembly Problems

Jeremy Brookley

Hello everyone,

I am currently having an issue with some code I have that seems to vary based on optimization:


In CommBuff ISR:



if (commData == 0x61)   /* 0x61 = 'a' */
{
        if(DAC1DifVoltn==1)
        {
                DigPressure1 = DiffPressure1;  // Enters this section, problem here
        }
        else
        {
                DigPressure1 = Pressure1>>3;
        }
        COMBUF = DigPressure1>>8;
}
else if (commData == 0x62)      /* 0x62 = 'b' */
{
        COMBUF = DigPressure1;
}

Currently, DAC1DifVoltn is set to 1. When the COMBUF register gets a 0x61, it updates DigPressure1 and puts out the MSB on the COMBUF. When it receives 0x62, it sends out the LSB bits.

The problem I'm having is with the line:

DigPressure1 = DiffPressure1;

DiffPressure1 is set to 0x0FF8. When optimization is set to 4-8, DigPressure1 is set to 0x0097. When it's set to 3, it gets 0x0F97. When it's set to 2-0, it gets the correct value (0x0FF8). Realistically, this has to do with the way my code is written rather than it being an assembly issue but I can't seem to see a better way to handle this.

Does anyone have any explanations as to what I can do? If you need me to post the assembly code, I can do that as well. Any help would be appreciated. Thanks!

Parents
  • 0 in reply to Jeremy Brookley

    Your disassembly screenshot shows that the code contains absolute register accesses. IIRC you have to be careful with assigning register banks to ISR's. Or I could be wrong and this is handled automatically by the compiler. Anyway, you can test this theory by ticking 'Don't use absolute register accesses' checkbox in compiler settings. Of course, less efficient code will be generated because of that.

Reply
  • 0 in reply to Jeremy Brookley

    Your disassembly screenshot shows that the code contains absolute register accesses. IIRC you have to be careful with assigning register banks to ISR's. Or I could be wrong and this is handled automatically by the compiler. Anyway, you can test this theory by ticking 'Don't use absolute register accesses' checkbox in compiler settings. Of course, less efficient code will be generated because of that.

Children
No data