A question about pipelines

Hi all

My question is not really related to Keil, but I didn't find any other forum to ask questions about ARM architecture, then I decided to ask it here.

I'm trying to write an emulator for ARM processors on x86. At first, I thought that it will be enough if I just run instructions(I want to support v4 to v5TE, v6 is something totally different from previous ones). But when I read more about it, I noticed that ARM pipeline structure has been changed from 3 step pipeline in ARM7TDMI to 5 step pipeline in ARM9E-S, and I guess this should heavily affect my code, because I didn't want to emulate ARM pipeline structure.
I thought if I don't emulate ARM7TDMI pipeline, there will be not too much problem if I will be careful for accessing Program Counter(R15). ARM7TDMI has 3 step pipeline(Fetch/Decode/Execute) and execution step is the last step, then running current instruction will not depend on previous instruction.
But in ARM9E-S, execution step is the 3rd step of a 5 step pipeline(Fetch/Decode/Execute/Memory access/Write Register), then I thought that running 2 instructions in these pipelines can effect each other. For example, I thought that these instructions should effect each other in this 5 step pipeline:

ldr r0,[r0]
add r0,r0,#1

Because when 1st instruction in 4th step for reading value of [r0], its value is needed for next instruction that is in execution step, but needs r0 value from decoding step which is already passed.
For testing this, I wrote these 2 lines of assembly code in Keil to make a problemistic situation, although it didn't work as I expected. Because I thought that after 2nd instruction, I should get incorrect value 1 at r0(because of pipeline), but I got [r0]+1 in it which is a correct value.
What am I missing here?
Can I really ignore pipeline steps in writing my emulator and just emulate instructions, or there are some cases which are affected by pipeline?

Regards