Hi All,
We have interfaced 1 SDRAM to LPC3250 (Lower 16 bit data line) .This SDRAM is from Micron technolgies 32 MB(MT48LC16M16A2).
Now problem is that we are not sure whether ,can we run our application code from the SDRAM ,because access from processor will be 32 bit wide , since we didn't connected anything on upper data line we will read junk values .
After seeing the refrence schematics provided by NXP we concluded that there is mistake in our hardware we should have connected 2 SDRAM (one on upper 16 bit and othe on Lower 16 bit) .
Question :
Is there still some way to run our code , can we build our code with THUMB instruction (16 bit)and run the code.
Please give your valuable feedback.
Thanks & Regards Sumit
Did you look at MDK example found in \ARM\Boards\Phytec\LPC3250\Blinky\ for reference?
hi, we have gone through blinky example,that interface is for 32 bit wide ,our case is only one SDRAM connected to DSY_CSO with 16 bit data bus
You need to configure the memory controller for 16 bit sdram, then 32 bit access will be treated as a pair of 16 bit accesses.
this means that you need to set the SDRAM controller for 16 bit memory, it will use 4 words buffers for memory accesses, but these will be translated into 8 word accesses to the SDRAM since the SDRAM controller buffers 4 32 bit words and the SDRAM needs to provide 8 16 bit words. You need to take care when programming the SDRAM devices to ensure that the CAS and Burst length settings are correctly aligned when writing the mode register. Since the memory is actually 16 bits you reduce the address shift by 1 bit compared to using 32 bit sdram, also take care that it is correctly aligned depending on the SDRAM controller mode ( Row,Bank,Column, or Bank,Row,Column).
so generally you will use a shift of ColumnAddressBits + 1 for Bank,Row,Column, and ColumAddressBits + 3 for RowBankColumn (assuming that there are 4 banks).
there is a good app note on the LPC forum ( LPCWARE.com ). regards
Phil.
Thanks for reply
from your reply we draw following Conclusion
1) Configure SDRAM Controller in 16 bit mode
2) Do 32 bit Access ?
but can we do 32 bit access when actually we are configuring SDRAM Controller for 16 bit and secondly what about 16 upper bit ,they are not physically mapped on hardware ,will processor do the buffering as you told because processor data sheet do not mention anything about it.
Can we get any reference code where LPC3250 is interfaced to single SDRAM via 16 bit SDRAM.
As have been mentioned long time a go - yes, if it is supported to configure the memory controller for use with a 16-bit memory you obviously have to do that. If it isn't supported, you are busted.
Next thing - if the memory controller supports 16-bit wide memory, then it will allow the processor core to perform 32-bit accesses. These 32-bit accesses will be converted into two 16-bit accesses to they memory. All the difference it makes to the processor core is that the memory accesses will be slower because the two 16-bit accesses must be made after each other.
"... because processor data sheet do not mention anything about it."
What processor information are you looking at?
In UM10326, section 7.2 (Features of the EMC) it states:
• 16-bit and 32-bit wide SDRAM memory support
That same chapter also has a note that says:
For SDRAM chip selects that are configured for 32-bit wide transfers, single SDRAM bursts are used. When SDRAM chip selects are configured for 16-bit wide transfers, a burst length of 2 is used. Mode registers in related SDRAM devices must be programmed accordingly.
Table 115 has a good table too.
Plenty for you to check out.