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UART with RL-ARM in low clock speed

Hello,

We have an application for LPC2368, based on RL-ARM, that run UART communication.
This is working very well.

For power consuming reasons, we need to slow the MCU clock down to 4 MHz (based on Internal Osc.).
Now, the UART work well up to 57600 baud rate. But in 115200 bps, I cannot receive any data although sending data work well. The debugger isn't even reach the UART IRQ at all.

In the data sheet I found that "Standard baud rates such as 115200 can be achieved with any crystal frequency above 2 MHz."

What can be the problem?
Is it possible that there is a conflict between UART and RL-ARM?

Parents
  • 1. Some of the LPC23xx batches have had production problems resulting in the internal boot loader failing to correctly autobaud at higher baudrates in which case you could suffer from the same problem.
    Do you have a source for this issue? We met the problem some times when we access to the internal bootloader from FlashMagic and the only workaround was to program the MCUs in 9600 bps. But I cannot find any reference in Erratasheet.

    2. I tested the baudrate issue with 12MHz external oscillator, and the 115200 mode work well, but when I divide the clock to 4MHz, this issue is back again. So, the problem is probably not with Oscillator accuracy.

    3. I am using the IRQ for TX and RX. The debugger is stopping in IRQ on TX, but not in RX (Only in 115200). I enabled interrupt for line status change so I excepted to get at least an error but didn't got nothing.

    I'll check the FIFO definition if it had to matter.

Reply
  • 1. Some of the LPC23xx batches have had production problems resulting in the internal boot loader failing to correctly autobaud at higher baudrates in which case you could suffer from the same problem.
    Do you have a source for this issue? We met the problem some times when we access to the internal bootloader from FlashMagic and the only workaround was to program the MCUs in 9600 bps. But I cannot find any reference in Erratasheet.

    2. I tested the baudrate issue with 12MHz external oscillator, and the 115200 mode work well, but when I divide the clock to 4MHz, this issue is back again. So, the problem is probably not with Oscillator accuracy.

    3. I am using the IRQ for TX and RX. The debugger is stopping in IRQ on TX, but not in RX (Only in 115200). I enabled interrupt for line status change so I excepted to get at least an error but didn't got nothing.

    I'll check the FIFO definition if it had to matter.

Children
  • "But I cannot find any reference in Erratasheet."

    I don't think NXP have officially posted any note. Just a "oops, sorry" and "your next batch shouldn't have this problem."

    I think you might need to contact NXP - and then keep this thread updated with anything interesting the NXP application engineers might tell you.