Hi Everyone..
I am a Newbie and just starting to write some programm for my lpc2378. At the moment i am trying to make the PLL Setup Sequence for my LPC2378. unfortunately i can't understand this step from User Manual
.. 4) Write to the clock source selection control register to change the clock souce.
I'd have the Main Oscillator as my Clock Source.
CLKSRCSEL = 0x1; /* select main OSC as the PLL clock source */ PLLFEED = 0xaa; PLLFEED = 0x55;
In User Manual can be read that The main oscillator operates at frequencies of 1 MHz to 24 MHz.
My Question: How can i operate the main oscillator with a constant freq? For example 12 MHz ? I need this constant frequenz, so i can configure my PLL
Anyone can help me??
Thank You
1) Your code isn't readable. Didn't you speed the notes on how to post source code?
2) Your feed() function doesn't contain any code for disabling interrupts - are all your PLL code run with interrupts disabled? If so - where is it documented? The user manual clearly says that the two feed operations must be two consecutive APB transfers, i.e. that no interrupt may happen in between.
3) What is the reason that you don't make use of the Keil-supplied startup code?
; Clock Setup ------------------------------------------------------------------ IF (:LNOT:(:DEF:NO_CLOCK_SETUP)):LAND:(CLOCK_SETUP != 0) LDR R0, =SCB_BASE MOV R1, #0xAA MOV R2, #0x55 ; Configure and Enable PLL LDR R3, =SCS_Val ; Enable main oscillator STR R3, [R0, #SCS_OFS] IF (SCS_Val:AND:OSCEN) != 0 OSC_Loop LDR R3, [R0, #SCS_OFS] ; Wait for main osc stabilize ANDS R3, R3, #OSCSTAT BEQ OSC_Loop ENDIF LDR R3, =CLKSRCSEL_Val ; Select PLL source clock STR R3, [R0, #CLKSRCSEL_OFS] LDR R3, =PLLCFG_Val STR R3, [R0, #PLLCFG_OFS] STR R1, [R0, #PLLFEED_OFS] STR R2, [R0, #PLLFEED_OFS] MOV R3, #PLLCON_PLLE STR R3, [R0, #PLLCON_OFS] STR R1, [R0, #PLLFEED_OFS] STR R2, [R0, #PLLFEED_OFS] IF (CLKSRCSEL_Val:AND:3) != 2 ; Wait until PLL Locked (if source is not RTC oscillator) PLL_Loop LDR R3, [R0, #PLLSTAT_OFS] ANDS R3, R3, #PLLSTAT_PLOCK BEQ PLL_Loop ELSE ; Wait at least 200 cycles (if source is RTC oscillator) MOV R3, #(200/4) PLL_Loop SUBS R3, R3, #1 BNE PLL_Loop ENDIF M_N_Lock LDR R3, [R0, #PLLSTAT_OFS] LDR R4, =(PLLSTAT_M:OR:PLLSTAT_N) AND R3, R3, R4 LDR R4, =PLLCFG_Val EORS R3, R3, R4 BNE M_N_Lock ; Setup CPU clock divider MOV R3, #CCLKCFG_Val STR R3, [R0, #CCLKCFG_OFS] ; Setup USB clock divider LDR R3, =USBCLKCFG_Val STR R3, [R0, #USBCLKCFG_OFS] ; Setup Peripheral Clock LDR R3, =PCLKSEL0_Val STR R3, [R0, #PCLKSEL0_OFS] LDR R3, =PCLKSEL1_Val STR R3, [R0, #PCLKSEL1_OFS] ; Switch to PLL Clock MOV R3, #(PLLCON_PLLE:OR:PLLCON_PLLC) STR R3, [R0, #PLLCON_OFS] STR R1, [R0, #PLLFEED_OFS] STR R2, [R0, #PLLFEED_OFS] ENDIF ; CLOCK_SETUP
Do note that this code is executed in supervisor mode therefore it is interrupt-safe.