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Optimizing FIQ

I have SPI interrupt defined as FIQ and the execution time for it should be less than 12us, but adding a few checks and the execution time is going out of the limit. I've seen that it takes 2-3us for the ARM7TDMI to enter the FIQ.
Can you give some ideas how to optimize it to enter it quickly or execute quickly?
What should I use/avoid?
I realized I should avoid using % because it takes about 3us to compute a%100!
Any advice is welcome.

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  • ARM has documentation mentioning the clock cycles required for all assembler instructions.

    Either write your code in assembler, or write the code in C and take a peek at the generated assembler output to make sure that you are familiar with the cost of different C constructs.

    Avoid thinking of instructions as taking 3us. Think of them as taking a specific number of clock cycles. Then decide what clock frequency you will have your processor core run. Knowing the required response time and the selected clock frequency will tell you the maximum number of clock cycles your FIQ may consume.

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  • ARM has documentation mentioning the clock cycles required for all assembler instructions.

    Either write your code in assembler, or write the code in C and take a peek at the generated assembler output to make sure that you are familiar with the cost of different C constructs.

    Avoid thinking of instructions as taking 3us. Think of them as taking a specific number of clock cycles. Then decide what clock frequency you will have your processor core run. Knowing the required response time and the selected clock frequency will tell you the maximum number of clock cycles your FIQ may consume.

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