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On executing code from RAM instead of flash...

Hi guys,

I've got a Cortex-M3 (STM32F103) application that updates code in flash.

From what I understand if the FPEC is busy with, say, flash erasing it won't fetch instructions for the core thereby stalling it.

I would like to avoid these stalls so I'd like the flash updating code to run out of RAM.

I'm using a custom scatter file and I'm not initializing anything.

I'm not using any RTOS or libraries.

Ideally I'd be able to define a section in flash where the code is stored so, on startup, I can just copy it into another section in RAM and execute it.

Many thanks,

0 Tamir Michael over 15 years ago

scatter file layout:

; ********************************************************************
; * ACCESS TO THE NOR FLASH IS SLOWER THAN TO LPC2478 INTERNAL FLASH *
; * DO NO MAP ANY TIME CRITICAL CODE HERE (COMPRESSOR CONTROL ETC.)  *
; * USE RAM REGION "ER_NOR_FLASH_RAM_ZONE" TO MAP MODULES TO RAM FOR *
; * FAST EXECUTION                                                                                                       *
; ********************************************************************
LR_IROM2 0x80000000 0x400000  {    ; load region size_region
  FMMAPP2 0x80000000 0x00400000  {  ; load address = execution address
        SYSTEM_ERROR_CODES.o
        APP_CENTAC_V4_FILE_INFO.o
  }

; *********************************************************************
; * These modules are executed in RAM (but stored in the NOR flash)   *
; * This code is copied into RAM by overriding the "__main" function  *
; * so that the scatter loading process of the application can access *
; * the NOR flash. See "main.c"                                                                             *
; *********************************************************************
  ER_NOR_FLASH_RAM_ZONE 0xA1100000 0x400000  {
        APP_MACHINE_ID.o
        APP_SOFTWARE_UPDATE.o
        APP_IO_CFG.o
        APP_VAR_INIT.o
        SOFTWARE_EVENT.o
        APP_OPTION_MODULE.o
        APP_FEATURE_LST.o
  }
}

note how the RAM execution zone is mapped UNDER the load region of the NOR flash.