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The phy_ref_clk must be running and internally ...

Hello,

I am trying to understand the following statement in the LPC23XX User Manual(UM10211 Rev.3, August 25, 2009). Any help is appreciated.

Page:226
The phy_ref_clk must be running and internally connected to the Ethernet block during this operation.

-RB

Parents
  • Does phy_ref_clk mean PHY Reference Clock?

    I am using MCB2300. Therefore, using RMII to interface MAC with PHY. RMII needs 50MHz. The X1 pin is connected to the Oscillator(OSC1). Correct?

    Do I have to enable OSC1?

    Thanks
    RB

Reply
  • Does phy_ref_clk mean PHY Reference Clock?

    I am using MCB2300. Therefore, using RMII to interface MAC with PHY. RMII needs 50MHz. The X1 pin is connected to the Oscillator(OSC1). Correct?

    Do I have to enable OSC1?

    Thanks
    RB

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