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Hi
I have an error that shows its ugly head now and then.... The µC I'm using is C8051F122.
When I debug I can locate the problem, but the bug does not show the same place in code all times.
What I see now is that when stepping over the following line:
SMB0CN = 0x44;
The register SMB0CN actually is set to 0xC4. This sets the BUSY bit in the register.
It can be resolved by removing the µC supply, but a RESET won't do. But after some time the problem shows again.....
Does anyone have an idea????
Best Regards....
"the compiler can delay actually making the change to the value until right before it needs it. It can even optimize the entire variable out of existence"
Indeed.
Perhaps these articles may be helpful in understanding some of the issues around compiler optimisation:
www.8052.com/.../175943
www.8052.com/.../96661
it would be nice to know what the error that started this whole ting is - I do not see it mentioned
questions 1) where did you get the IIC code from 2) is/are the attached chip(s) IIC or SMB? 3) have you disabled the timeouts in SMB0CN 4) have you removed the capacitor on the reset pin 5) set the optimizationh to 2 - NOTHING ELSE WHEN DEBUGGING 6) the name Morten makes me guess - what nationality are you
Erik
The I2C code has existed for long has been working properly. Two slaves are connected to the I2C bus.
The timeout has been disabled in SMB0CN, and the C has not been removed.
If I lower the optimization to 2, Warnings will show under download:
for example: "Warning! An attempt was made to modify address 1FD09 which is restricted! Continue download?"
if I press "OK" the address is incremented and a new box is thrown...
Is your code so bloated that you overrun 127k with opt 2 switch to e.g. an ARM
Otherwise find out what writes to the "protection and other stuff area" and fix it. The .map file should show you what to look for.
Many do not realize that the top 1k if the f12x/f13x is not code memory but 'restricted'. If you write certain locations the whole shebang will lock up.