Hi, i hope someone can help me,
I want to recreate a J1850 communication. I have to generate changes on an output pin that have to come with intervals from 7,5 to 48 micro seconds.
so i have to generate very accurate delay times.
first i tried with counters and i failed (maybe for the same reason explained under), so i have used something like this:
... J1850SW_TX_DOMINANT(); // macro: move pin down Time = J1850SW_TSOF_DOMINANT; // 198 right number found with oscilloscope () while(Time) { __nop(); Time--; } J1850SW_TX_PASSIVE(); // macro: move pin up Time = J1850SW_TSOF_PASSIVE; // 146 right number found with oscilloscope () while(Time) { __nop(); Time--; } ...
yes, i know that is not sure that compiler will translate every time in the same way.
so i generate a .s assembly file:
MOV r0,#0x20000 // move pin down LDR r1,|L1.1140| STR r0,[r1,#0x98] MOV r0,#0x80000000 STR r0,[r1,#0x9c] MOV r0,r0 MOV r6,#0xc6 B |L1.276| |L1.260| MOV r0,r0 SUB r0,r6,#1 LSL r6,r0,#16 LSR r6,r6,#16 |L1.276| CMP r6,#0 BNE |L1.260| MOV r0,r0 MOV r0,#0x20000 // move pin up LDR r1,|L1.1140| STR r0,[r1,#0x9c] MOV r0,#0x80000000 STR r0,[r1,#0x98] MOV r0,r0 MOV r6,#0x92 B |L1.336| |L1.320| MOV r0,r0 SUB r0,r6,#1 LSL r6,r0,#16 LSR r6,r6,#16 |L1.336| CMP r6,#0 BNE |L1.320|
and then i imported in the keil project the .o file object directly. it is possible and it works. every time i compile, the code is always the same.
what's the problem, you'll say!
the problem is that if i change the linking order of the file, delay change... interrupt are all disable, no call is made from the source file to functions in other file...
so why this behaviour? how it is possible that linking order affect code execution? maybe the sector in wich code is executing?
if i don't know what's the problem, i cannot be sure that source will always work.
thanks for all answers
I haven't worked with your chip, and also don't know what memory you may have connected or the potential ways your project may be configured.
But different memory controllers or memory regions may have different settings for memory timing.
And if you have code in memory handled by different memory controllers you could also have a memory region that is affected by DMA transfers (USB, Ethernet, ...) while another region isn't affected.
It is sometimes important to look at the memory crossbars in the processor to see what may share the available bandwidth.