Hello all,
My lpc2129 is running at 60Mhz with a 10Mhz clock. What could be the minimum possible timer interrupt??(ex:- 1 uSec or so)
First you need to know the clock source for your timer. In your case it would be pclk/timer prescaler VPBDIV register can be used to configure the peripheral clock(pclk) After you have configured(or just realized the value of) your pclk, you can find the minimum possible timer interrupt. For example: if pclk = 5MHz timer prescaler = 0, then one timer tick is 1/5MHz = 0.2us. So to have the minimum possible timer interrupt you need to set your timer prescaler to 0 and configure your timer to interrupt on every timer tick
Note: be careful if you change pclk, because it is used by other peripherals too, not just your timer
I read the question as: how many interrupts/second will the processor manage to handle without getting overloaded.
And that obviously depends on the amount of instructions consumed by each ISR invocation.