As per some document reference that I found on net the expected vector table generated by assembler is give below
__Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler [...more vectors...]
00000000 LDR PC, =__initial_sp 00000004 LDR PC, =Reset_Handler 00000008 LDR PC, =NMI_Handler
but if we see actual code, it will be like
0x00000000 0268 LSLS r0,r5,#9 0x00000002 1000 ASRS r0,r0,#0 0x00000004 0169 LSLS r1,r5,#5 0x00000006 0000 MOVS r0,r0 0x00000008 0171 LSLS r1,r6,#5 0x0000000A 0000 MOVS r0,r0 0x0000000C 0173 LSLS r3,r6,#5 0x0000000E 0000 MOVS r0,r0
Any idea where will be the vector table?
Thanks
For ARM7 it has Reset Vector too, after Reset, the ARM core fetches the first instruction from address 0x00 (Reset Vector).
Originally, I thought that the OP is migrating from ARM7 to Cortex-M0; so I wrote that.
Note that one of the significant differences between ARM7 and Cortex-Mx is in the interrupt handling - including the vectors.
ARM7 Vectors: infocenter.arm.com/.../index.jsp
Thanks Andy Now I am clear in concept
:)
Regards Mahesh M