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Interrrupts During IAP

Anu Ambre

Hi,

I am working on LPC2468.

I able to use IAP with disabling Interrupts,but I want some interrupts to work even with IAP.

I can done this with remapping of interrupt vectors in RAM & executing it from RAM itself.

Anyone can help me out for this.

Anu

Parents
  • 0

    I once had to use the SD/MMC during the IAP. All of the interrupts were disabled. I just polled the MMC_handler of the SD/MMC by hand till the job is finished. And it worked. Just make sure you do not call the IRQ handler directly. Call the user-level handler code...

Reply
  • 0

    I once had to use the SD/MMC during the IAP. All of the interrupts were disabled. I just polled the MMC_handler of the SD/MMC by hand till the job is finished. And it worked. Just make sure you do not call the IRQ handler directly. Call the user-level handler code...

Children
  • 0 in reply to Haluk YILMAZ

    Thanks for reply.

    We will try associates & revert back to you

  • 0 in reply to Anu Ambre

    Hi Per,

    As you said i tried to place the ISR in RAM. i am able to copy only the first 64 byte.

    Later i tied this :--

    ; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************

LR_IROM1 0x00000000 0x00080000  {    ; load region size_region
  ER_IROM1 0x00000000 0x00080000  {  ; load address = execution address
   *.o (RESET, +First)
   *(InRoot$$Sections)
    LPC2300.o (+RO)
    readfifo.o (+RO)
   .ANY (+RO)
  }
  ER_ROM1  0x81000000 0x00080000  {  ; RW data
         *.o (+RO)
 }
 RW_IRAM1 0x40000000 0x00010000 {
 LPC2300.o (+ZI +RW)
    readfifo.o (+ZI +RW)
   .ANY (+RW +ZI)
  }
}


    set the memmap = 0x03.

    i found the code executing from 0x81000000 on simulator but when an interrupt occurs it jumps to 0x00000018. Instead it should jump to 0x81000018????
    (where am i going wrong? plz help)

    the VICAddress register is pointing to the copy of ISR in external memory..

    thanks

  • 0 in reply to Anu Ambre

    The interrupts are always jumping to low addresses.

    That is why the MEMMAP register allows you to map a part of RAM to overlay the 64 first bytes of the flash with an alternating interrupt table that will point to your ISR in RAM.

    So the processor jumps to a low address in flash, but finds the remapped interrupt table and picks up the new jump address - then continuing into RAM code within the RAM address range.

    The goal is to have your ISR and all required code in a separate segment that gets stored in the flash, but is linked as having a RAM address. The startup code will then copy the required functions from flash to RAM, making sure that when your remapped interrupt vectors points into RAM, you will have the required code available there.