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hello,I use KEIL uvision and ulink2 to test the uart of lpc2366. And the Uart0 can transmit and receive data fine; when change the code to use uart2, the uart2 only can transmit data, but lpc2366 will reset and can't receive data when host transmit data to lpc2366; I had checked the code several times. I find the lpc2366 can't go into the interrupt, but I can't deal with it. I think the code to initial UART VIC has some wrong.
The code of UART2 is as follow:
#define UART2_BAUD (9600) #define UART2_INT 28 uint8 rcv2_buf[16]; volatile uint8 rcv2_new; void __irq IRQ_UART2 (void) { uint8 i; uint32 IIR = 0; while (((IIR = U2IIR) & 0x01) == 0) { switch (IIR & 0x0e) { case 0x02: break; case 0x04: //Rx FIFO for (i=0; i<8; i++) { rcv2_buf[i] = U2RBR; } break; case 0x0c: //CTI for (i=8; i<16; i++) { rcv2_buf[i] = U2RBR; } rcv2_new=2; IO0CLR |= 0x3<<27; break; case 0x06: break; default : break; } } VICVectAddr = 0x00; } void UART2_Init(void) { uint32 Fdiv = 0; PCONP |= 1 << 24; PINSEL0 |= (0x01 << 20) | (0x01 << 22); U2LCR = 0x83; // Fdiv = (Fpclk / 16) / UART2_BAUD; // set uart2 baud U2DLM = Fdiv / 256; U2DLL = Fdiv % 256; U2LCR = 0x03; // DLAB=0 U2FCR |= 0x87; // U2FDR &= ~0x0f; // DIVADDVAL=0 U2FDR |= 0x10; // MULVAL=1 U2IER = 0x05; /* init UART VIC */ VICIntEnClr |= 1 << UART2_INT; VICVectPri8 = 0x05; VICVectAddr8 = (uint32)IRQ_UART2; VICIntEnable |= 1 << UART2_INT; }
Why do you use VICVectAddr8 if the UART2 interrupt is 28?
U2LCR = 0x83; // Fdiv = (Fpclk / 16) / UART2_BAUD; // set uart2 baud U2DLM = ( Fdiv / 256 ); U2DLL = ( Fdiv % 256;) U2LCR = 0x03; // DLAB=0
I choose VICVectAddr8 randomly according the experience of LPC213x. But It maybe a wrong operation in LPC236x. is the VIC slot must be the same of interrupt bit? I will test it tonight. Thanks
"I choose VICVectAddr8 randomly according the experience of LPC213x."
Danger, Will Robinson!.
Experience of chip A doesn't mean experience of chip B.
Note that LPC21xx has a control register that sepcifies what interrupt source that is handled by VICVectAddrX.
LPC23xx instead have a priority register that configures the priority for interrupt source X.
In the end, it is important to always read through the documentation for the used chip and make sure that what you do matches the documentation and not just matches previous experiences with other chips.
How true!
But there seems to be several posts recently where people are assuming that, because Chip-A does it this way, then Chip-B must also do it the same way?
Mostly NXP chips, IIRC.
Is this because people are naieve, or are NXP (et al?) overstating the "compatabilities" between their chips...?
Thanks Per Westermark very much!
Although I had read the datasheet of LPC2366，I do not have a good understanding of these registers. I have recognized the mistake in the project. What you say is so right. I will be more focused.
Note that NXP in particular (though they are not alone) have a distinct "datasheet" and "user manual".
The "datasheet" is basically just electrical characteristics; it's the "user manual" that you need for detailed register descriptions.
Short development period, and long data sheet is not straightforward, even the detailed register descriptions. I have no enough time to read through the data sheet and understand the use of all registers. But I would be more serious.
In that case, you don't have enough time to do the project!