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intel hex file format change?

what has changed in the basic hex file output format moving from uvision 2 to uvision3 and 4?

i have several hex files from examples from keil and analog for my part and they work fine if i try to program the part, but now i open up uvision 4 and start a new program to do nothing but toggle one gpio and it doesnt work.

with nothing else in the program but toggling one io, it doesnt work. it all works in the simulator just fine but not in the part anymore.

so before the hex files worked fine and i could compile and write a blinky style program into my part and all was well, now it compiles and simulates fine but doesnt work.

are there some retarded hidden compiler options im missing, or what, all i know is when i write a program to toggle just this one io that was compiled in uvision 2 its fine and compiled in uvision4 it doesnt do anything.

Parents
  • and the old startup from uv2

    
    # Starupt Code must be linked first at Address at which it expects to run.
    
            .text
            .arm
    
            .global _startup
            .func   _startup
    _startup:
    
    
    # Exception Vectors
    #  Mapped to Address 0.
    #  Absolute addressing mode must be used.
    #  Dummy Handlers are implemented as infinite loops which can be modified.
    
    Vectors:        LDR     PC, Reset_Addr
                    LDR     PC, Undef_Addr
                    LDR     PC, SWI_Addr
                    LDR     PC, PAbt_Addr
                    LDR     PC, DAbt_Addr
                    NOP                            /* Reserved Vector */
                    LDR     PC, IRQ_Addr
                    LDR     PC, FIQ_Addr
    
    Reset_Addr:     .word   Reset_Handler
    Undef_Addr:     .word   ADI_UNDEF_Interrupt_Setup
    SWI_Addr:       .word   ADI_SWI_Interrupt_Setup
    PAbt_Addr:      .word   ADI_PABORT_Interrupt_Setup
    DAbt_Addr:      .word   ADI_DABORT_Interrupt_Setup
    IRQ_Addr:       .word   ADI_IRQ_Interrupt_Setup
    FIQ_Addr:       .word   ADI_FIQ_Interrupt_Setup
    
    # Reset Handler
    
    Reset_Handler:
    
    
    .if PLL_SETUP
                    LDR     R0, =MMR_BASE
                    MOV     R1, #0x01
                    STR     R1, [R0,#POWKEY1_OFFSET]
                    MOV     R1, #PLLCFG_Val
                    STR     R1, [R0,#POWCON_OFFSET]
                    MOV     R1, #0xF4
                    STR     R1, [R0,#POWKEY2_OFFSET]
    .endif
    
    
    # Setup Pins
    .if GPIO_SETUP
    
                    ADR     R10, GPIO_CFG          /* Pointer to GPIO CFG */
                    LDMIA   R10, {R0-R5}           /* Load GPIO Configuration */
                    STMIA   R0, {R1-R5}            /* Store GPxCON */
                    B       GPIO_END
    
    GPIO_CFG:       .word   GPIOBASE
                    .word   GP0CON_Val
                    .word   GP1CON_Val
                    .word   GP2CON_Val
                    .word   GP3CON_Val
                    .word   GP4CON_Val
    GPIO_END:
    
    .endif  /* GPIO_SETUP */
    
    
    # Setup External Memory Interface
    .if XM_SETUP
    
                    ADR     R10, XM_CFG            /* Pointer to XM CFG */
                    LDMIA   R10, {R0-R9}           /* Load XM Configuration */
                    STR     R1, [R0],#0x10         /* Store XMCFG */
                    STMIA   R0, {R2-R9}            /* Store XMxCON & XMxPAR */
                    B       XM_END
    
    XM_CFG:         .word   XMBASE
                    .word   XMCFG_Val
                    .word   XM0CON_Val
                    .word   XM1CON_Val
                    .word   XM2CON_Val
                    .word   XM3CON_Val
                    .word   XM0PAR_Val
                    .word   XM1PAR_Val
                    .word   XM2PAR_Val
                    .word   XM3PAR_Val
    XM_END:
    
    .endif  /* XM_SETUP */
    
    
    # Setup Stack for each mode
    
                    LDR     R0, =Top_Stack
    
    #  Enter Undefined Instruction Mode and set its Stack Pointer
                    MSR     CPSR_c, #Mode_UND|I_Bit|F_Bit
                    MOV     SP, R0
                    SUB     R0, R0, #UND_Stack_Size
    
    #  Enter Abort Mode and set its Stack Pointer
                    MSR     CPSR_c, #Mode_ABT|I_Bit|F_Bit
                    MOV     SP, R0
                    SUB     R0, R0, #ABT_Stack_Size
    
    #  Enter FIQ Mode and set its Stack Pointer
                    MSR     CPSR_c, #Mode_FIQ|I_Bit|F_Bit
                    MOV     SP, R0
                    SUB     R0, R0, #FIQ_Stack_Size
    
    #  Enter IRQ Mode and set its Stack Pointer
                    MSR     CPSR_c, #Mode_IRQ|I_Bit|F_Bit
                    MOV     SP, R0
                    SUB     R0, R0, #IRQ_Stack_Size
    
    #  Enter Supervisor Mode and set its Stack Pointer
                    MSR     CPSR_c, #Mode_SVC|I_Bit|F_Bit
                    MOV     SP, R0
                    SUB     R0, R0, #SVC_Stack_Size
    
    #  Enter User Mode and set its Stack Pointer
                    MSR     CPSR_c, #Mode_USR
                    MOV     SP, R0
    
    #  Setup a default Stack Limit (when compiled with "-mapcs-stack-check")
                    SUB     SL, SP, #USR_Stack_Size
    
    
    # Relocate .data section (Copy from ROM to RAM)
                    LDR     R1, =_etext
                    LDR     R2, =_data
                    LDR     R3, =_edata
    LoopRel:        CMP     R2, R3
                    LDRLO   R0, [R1], #4
                    STRLO   R0, [R2], #4
                    BLO     LoopRel
    
    
    # Clear .bss section (Zero init)
                    MOV     R0, #0
                    LDR     R1, =__bss_start__
                    LDR     R2, =__bss_end__
    LoopZI:         CMP     R1, R2
                    STRLO   R0, [R1], #4
                    BLO     LoopZI
    
    
    # Enter the C code
    
    .if En_StdIO
    
    # Enter the standard system startup code required for stdlib I/O
                    B       _start
    
    .else
    
                    LDR     LR, =__Return_from_main
                    LDR     R0, =main
                    BX      R0
    
    __Return_from_main:
                    B       __Return_from_main
    
    .endif
    
    
            .size   _startup, . - _startup
            .endfunc
    
    
            .end
    
    

Reply
  • and the old startup from uv2

    
    # Starupt Code must be linked first at Address at which it expects to run.
    
            .text
            .arm
    
            .global _startup
            .func   _startup
    _startup:
    
    
    # Exception Vectors
    #  Mapped to Address 0.
    #  Absolute addressing mode must be used.
    #  Dummy Handlers are implemented as infinite loops which can be modified.
    
    Vectors:        LDR     PC, Reset_Addr
                    LDR     PC, Undef_Addr
                    LDR     PC, SWI_Addr
                    LDR     PC, PAbt_Addr
                    LDR     PC, DAbt_Addr
                    NOP                            /* Reserved Vector */
                    LDR     PC, IRQ_Addr
                    LDR     PC, FIQ_Addr
    
    Reset_Addr:     .word   Reset_Handler
    Undef_Addr:     .word   ADI_UNDEF_Interrupt_Setup
    SWI_Addr:       .word   ADI_SWI_Interrupt_Setup
    PAbt_Addr:      .word   ADI_PABORT_Interrupt_Setup
    DAbt_Addr:      .word   ADI_DABORT_Interrupt_Setup
    IRQ_Addr:       .word   ADI_IRQ_Interrupt_Setup
    FIQ_Addr:       .word   ADI_FIQ_Interrupt_Setup
    
    # Reset Handler
    
    Reset_Handler:
    
    
    .if PLL_SETUP
                    LDR     R0, =MMR_BASE
                    MOV     R1, #0x01
                    STR     R1, [R0,#POWKEY1_OFFSET]
                    MOV     R1, #PLLCFG_Val
                    STR     R1, [R0,#POWCON_OFFSET]
                    MOV     R1, #0xF4
                    STR     R1, [R0,#POWKEY2_OFFSET]
    .endif
    
    
    # Setup Pins
    .if GPIO_SETUP
    
                    ADR     R10, GPIO_CFG          /* Pointer to GPIO CFG */
                    LDMIA   R10, {R0-R5}           /* Load GPIO Configuration */
                    STMIA   R0, {R1-R5}            /* Store GPxCON */
                    B       GPIO_END
    
    GPIO_CFG:       .word   GPIOBASE
                    .word   GP0CON_Val
                    .word   GP1CON_Val
                    .word   GP2CON_Val
                    .word   GP3CON_Val
                    .word   GP4CON_Val
    GPIO_END:
    
    .endif  /* GPIO_SETUP */
    
    
    # Setup External Memory Interface
    .if XM_SETUP
    
                    ADR     R10, XM_CFG            /* Pointer to XM CFG */
                    LDMIA   R10, {R0-R9}           /* Load XM Configuration */
                    STR     R1, [R0],#0x10         /* Store XMCFG */
                    STMIA   R0, {R2-R9}            /* Store XMxCON & XMxPAR */
                    B       XM_END
    
    XM_CFG:         .word   XMBASE
                    .word   XMCFG_Val
                    .word   XM0CON_Val
                    .word   XM1CON_Val
                    .word   XM2CON_Val
                    .word   XM3CON_Val
                    .word   XM0PAR_Val
                    .word   XM1PAR_Val
                    .word   XM2PAR_Val
                    .word   XM3PAR_Val
    XM_END:
    
    .endif  /* XM_SETUP */
    
    
    # Setup Stack for each mode
    
                    LDR     R0, =Top_Stack
    
    #  Enter Undefined Instruction Mode and set its Stack Pointer
                    MSR     CPSR_c, #Mode_UND|I_Bit|F_Bit
                    MOV     SP, R0
                    SUB     R0, R0, #UND_Stack_Size
    
    #  Enter Abort Mode and set its Stack Pointer
                    MSR     CPSR_c, #Mode_ABT|I_Bit|F_Bit
                    MOV     SP, R0
                    SUB     R0, R0, #ABT_Stack_Size
    
    #  Enter FIQ Mode and set its Stack Pointer
                    MSR     CPSR_c, #Mode_FIQ|I_Bit|F_Bit
                    MOV     SP, R0
                    SUB     R0, R0, #FIQ_Stack_Size
    
    #  Enter IRQ Mode and set its Stack Pointer
                    MSR     CPSR_c, #Mode_IRQ|I_Bit|F_Bit
                    MOV     SP, R0
                    SUB     R0, R0, #IRQ_Stack_Size
    
    #  Enter Supervisor Mode and set its Stack Pointer
                    MSR     CPSR_c, #Mode_SVC|I_Bit|F_Bit
                    MOV     SP, R0
                    SUB     R0, R0, #SVC_Stack_Size
    
    #  Enter User Mode and set its Stack Pointer
                    MSR     CPSR_c, #Mode_USR
                    MOV     SP, R0
    
    #  Setup a default Stack Limit (when compiled with "-mapcs-stack-check")
                    SUB     SL, SP, #USR_Stack_Size
    
    
    # Relocate .data section (Copy from ROM to RAM)
                    LDR     R1, =_etext
                    LDR     R2, =_data
                    LDR     R3, =_edata
    LoopRel:        CMP     R2, R3
                    LDRLO   R0, [R1], #4
                    STRLO   R0, [R2], #4
                    BLO     LoopRel
    
    
    # Clear .bss section (Zero init)
                    MOV     R0, #0
                    LDR     R1, =__bss_start__
                    LDR     R2, =__bss_end__
    LoopZI:         CMP     R1, R2
                    STRLO   R0, [R1], #4
                    BLO     LoopZI
    
    
    # Enter the C code
    
    .if En_StdIO
    
    # Enter the standard system startup code required for stdlib I/O
                    B       _start
    
    .else
    
                    LDR     LR, =__Return_from_main
                    LDR     R0, =main
                    BX      R0
    
    __Return_from_main:
                    B       __Return_from_main
    
    .endif
    
    
            .size   _startup, . - _startup
            .endfunc
    
    
            .end
    
    

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