Respected colleagues,
can anybody please post a sample on how to configure a uVision4 project for use of an external SRAM for data storage on the Keil MCB2929 evaluation board? Do I have to configure a Static Memory Controller (SMC) (and how?), or is it sufficient to configure Memory Areas in the Device Target Options?
Thanks in advance.
With best regards, Dragan Kujovic
Respected Colleagues,
because nobody from Keil stuff and from this Forum wanted to help me with SRAM access on the Keil MCB2929 Evaluation Board, I wrote a needed code. Everything works OK.
Here it is if somebody need it.
/*****************************************************************************************/ /* Keil MCB2929 Evaluation Board SRAM Access Example - Dragan Kujovic 18.11.2010. /*****************************************************************************************/
#include "LPC29xx.h"
#define EXT_SRAM_BaseAddress 0x40000000 #define Mem_16(adr) (*((volatile unsigned short *) (adr)))
/*****************************************************************************************/
unsigned short Ext_SRAM_Data = 12345; unsigned int Ext_SRAM_Address = 0x00; unsigned short Value = 0;
SMC_Setup(); // Static Memory Controller Init
// Only EVEN Addresses are valid !!! (Every 2nd Address)
SRAM_WordWrite(Ext_SRAM_Data, Ext_SRAM_Address);
Value = SRAM_WordRead (Ext_SRAM_Address);
void SMC_Setup(void) {
// SMC Address lines setup // ======================= SFSP1_0 = (0x01<<2)|(0x03<<0); // Port 1.0 - Ext.Bus A.0 SFSP1_1 = (0x01<<2)|(0x03<<0); // Port 1.1 - Ext.Bus A.1 SFSP1_2 = (0x01<<2)|(0x03<<0); // Port 1.2 - Ext.Bus A.2 SFSP1_3 = (0x01<<2)|(0x03<<0); // Port 1.3 - Ext.Bus A.3 SFSP1_4 = (0x01<<2)|(0x03<<0); // Port 1.4 - Ext.Bus A.4 SFSP1_5 = (0x01<<2)|(0x03<<0); // Port 1.5 - Ext.Bus A.5 SFSP1_6 = (0x01<<2)|(0x03<<0); // Port 1.6 - Ext.Bus A.6 SFSP1_7 = (0x01<<2)|(0x03<<0); // Port 1.7 - Ext.Bus A.7 SFSP0_10 = (0x01<<2)|(0x03<<0); // Port 0.10 - Ext.Bus A.8 SFSP0_11 = (0x01<<2)|(0x03<<0); // Port 0.11 - Ext.Bus A.9 SFSP0_12 = (0x01<<2)|(0x03<<0); // Port 0.12 - Ext.Bus A.10 SFSP0_13 = (0x01<<2)|(0x03<<0); // Port 0.13 - Ext.Bus A.11 SFSP0_14 = (0x01<<2)|(0x03<<0); // Port 0.14 - Ext.Bus A.12 SFSP0_15 = (0x01<<2)|(0x03<<0); // Port 0.15 - Ext.Bus A.13 SFSP0_18 = (0x01<<2)|(0x03<<0); // Port 0.18 - Ext.Bus A.14 SFSP0_19 = (0x01<<2)|(0x03<<0); // Port 0.19 - Ext.Bus A.15 SFSP0_20 = (0x01<<2)|(0x03<<0); // Port 0.20 - Ext.Bus A.16 SFSP0_21 = (0x01<<2)|(0x03<<0); // Port 0.21 - Ext.Bus A.17 SFSP0_22 = (0x01<<2)|(0x03<<0); // Port 0.22 - Ext.Bus A.18 SFSP0_23 = (0x01<<2)|(0x03<<0); // Port 0.23 - Ext.Bus A.19
// SMC Data lines setup // ==================== SFSP1_14 = (0x01<<2)|(0x03<<0); // Port 1.14 - Ext.Bus D.0 SFSP1_15 = (0x01<<2)|(0x03<<0); // Port 1.15 - Ext.Bus D.1 SFSP1_16 = (0x01<<2)|(0x03<<0); // Port 1.16 - Ext.Bus D.2 SFSP1_17 = (0x01<<2)|(0x03<<0); // Port 1.17 - Ext.Bus D.3 SFSP1_18 = (0x01<<2)|(0x03<<0); // Port 1.18 - Ext.Bus D.4 SFSP1_19 = (0x01<<2)|(0x03<<0); // Port 1.19 - Ext.Bus D.5 SFSP1_20 = (0x01<<2)|(0x03<<0); // Port 1.20 - Ext.Bus D.6 SFSP1_21 = (0x01<<2)|(0x03<<0); // Port 1.21 - Ext.Bus D.7 SFSP2_0 = (0x01<<2)|(0x03<<0); // Port 2.0 - Ext.Bus D.8 SFSP2_1 = (0x01<<2)|(0x03<<0); // Port 2.1 - Ext.Bus D.9 SFSP2_2 = (0x01<<2)|(0x03<<0); // Port 2.2 - Ext.Bus D.10 SFSP2_3 = (0x01<<2)|(0x03<<0); // Port 2.3 - Ext.Bus D.11 SFSP2_4 = (0x01<<2)|(0x03<<0); // Port 2.4 - Ext.Bus D.12 SFSP2_5 = (0x01<<2)|(0x03<<0); // Port 2.5 - Ext.Bus D.13 SFSP2_6 = (0x01<<2)|(0x03<<0); // Port 2.6 - Ext.Bus D.14 SFSP2_7 = (0x01<<2)|(0x03<<0); // Port 2.7 - Ext.Bus D.15
// SMC Control lines setup // ======================= SFSP1_8 = (0x01<<2)|(0x03<<0); // Port 1.8 - Ext.Bus CS0# SFSP1_12 = (0x01<<2)|(0x03<<0); // Port 1.12 - Ext.Bus OE# SFSP1_13 = (0x01<<2)|(0x03<<0); // Port 1.13 - Ext.Bus WE# SFSP2_14 = (0x01<<2)|(0x03<<0); // Port 2.14 - Ext.Bus BLS0# SFSP2_15 = (0x01<<2)|(0x03<<0); // Port 2.15 - Ext.Bus BLS1#
// SMC Memory Bank 0 Setup // ======================= SMC_IDCYR0 = 0x0F; // Idle-cycle control register (Reset value = 0x0F) SMC_WST1R0 = 0x03; // Wait-state 1 control register (Reset value = 0x1F) SMC_WST2R0 = 0x03; // Wait-state 2 control register (Reset value = 0x1F) SMC_WSTOENR0 = 0x02; // Output-enable assertion delay control register (Reset value = 0x00) SMC_WSTWENR0 = 0x02; // Write-enable assertion delay control register (Reset value = 0x01) SMC_CR0 = 0x40; // Configuration register (16-bit) (Reset value = 0x80)
void SRAM_WordWrite(unsigned short SRAM_Data, unsigned int CurrentAddress) {
Mem_16(EXT_SRAM_BaseAddress + CurrentAddress) = SRAM_Data;
}
unsigned short SRAM_WordRead (unsigned int CurrentAddress) {
static unsigned short SRAM_Data;
SRAM_Data = Mem_16(EXT_SRAM_BaseAddress + CurrentAddress);
return SRAM_Data;
Three things:
1) This is a end user forum. Keil stuff [sic!] don't normally read posts here. They have specific contact information available to reach their support.
2) And a large percentage of the people who do have the skills to help on this forum, are quite busy with their own projects, since they are commercial developers.
3) Have you checked that you don't have a startup file that already contains support for external memory? The file LPC29xx.s does seem to contain the definitions, to use the Keil Configuration Wizard to configure memory access.
Without opening the projects, it looks like some of the examples for the MCB2929 does configure external memory in the LPC29xx.s file.
A question here - did you look into the startup file before starting to write C code?