I need three time period for onewire data reading. Without writing any ISR and can I get required time periods by polling M0, M1 and M2 match register interrup flags. Following code is what I am working on and it doesn't work. Is there any missing settings else?
#define Presc 14 //--------------------------16 bit write ---------------------------- void onewire_write(short int bayt, short int data) // 6, 54, 10 { short int count, bits; bits = bayt * 8; #define AB 6 #define BC 60 #define DD 10 #define M0_i 1 // Bit <2:0> <s:r:i> Stop,Reset,Interrupt #define M1_i 1<<3 // Bit <5:3> <s:r:i> " #define M2_irs 7<<6 // Bit <8:6> <s:r:i> " T1PR = Presc; // Prescale 15, 60 MHz CClock, 15 MHz PCLCK T1MR0 = AB; // Wait this long T1MR1 = AB+BC; // Wait this long T1MR2 = AB+BC+DD ; // Wait this long T1MCR = M0_i | M1_i | M2_irs; // Interrupt,stop and reset settings of Match regs T1TCR = 0x02; // Reset timer1 for (count=0; count<bits; ++count) { output_low(); T1TCR = 0x01; // timer1 starts while(!(T1IR & 1)); // Wait for int flag if ( data&1 != 0 ) output_float(); // write 0 or 1 data >>= 1; while(!(T1IR & 2)); // Wait for int flag output_float(); // set 1-wire high again, while(!(T1IR & 4)); // Wait for int flag T1IR = 0x07; // Clear M2, M1, M0 interrupts } }
Note that your timing is critical while doing the individual operations, such as reset (to a lesser degree), and reading or writing individual bits. But the onewire interface allows you to pause the transfer between the individual bits.
This allows you to only disable interrupts around each bit transfer, instead of having one huge (and very slow) section where interrupts are disabled for milliseconds.
Too long sections with interrupts disabled means that serial communication and other activities that are interrupt-driven may fail. For serial communication, you may get overruns because you don't pick up received characters before new ones arrives. Even when the processor have a receive FIFO, you still have to service the UART regularly.
Dear Westermark, you are absolutely right. So I will transfer the disable and enable interrupts call instruction to bit writing or reading loops of write and read functions.