Can somebody please explain what the ISR of a DMA-enabled SSPx peripheral needs to do? I've read the user manual of the LPC24xx but I still don't fully understand how the ISR of the DMA (indicating end of transfer) relates to the ISR of SSPx - without DMA the incoming data is collected, but with DMA enabled the data should be handled by the DMA...?
I have found this in the user manual:
4.2.13 The completion of the DMA transfer indication The completion of the DMA transfer is indicated by: 1. The transfer count reaching 0 if the GPDMA is performing flow control, OR 2. The peripheral setting the DMA Last Word Request Input (DMACLSREQ) or the DMA Last Burst Request Input (DMALBREQ) if the peripheral is performing flow control. According to Table 32–651 “DMA Connections”, SSP0, SSP1 and I2S do not use DMA Last Word Request Input nor DMA Last Burst Request Input. Therefore there will be no indication of completion if SSP0, SSP1 and I2S are performing the flow control.
does this mean that when SSP1 is coupled to DMA (which must do the flow control, according to paragraph 2), the DMA cannot try to transfer more than the hardware buffer size of SSP (8 bytes) per transfer?
I am sending 16 bytes into the SSP peripheral. I _always_ have the first 8 bytes transferred via DMA to the right place, but the next 8 bytes are not! Does anybody have any idea what might cause this?