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Has anyone used the __pld() instruction intrinsic with the Keil compiler tools?
According to the ARM V7-M Architecture Reference Manual: "The effect of these memory system hints is IMPLEMENTATION DEFINED".
Please. No 'what are you using this for' questions. Right now this is just a research on my part to determine whether or not I would need to use this intrinsic. Since this is implementation defined I would need to know if this is even used within the Keil environment and what would be the benefit (if any) over using this rather than say optimization level 3 or even using the volatile keyword.
Thanks.
I'm not sure I agree with your summary.
I can influence the potential operation of the compiler regarding the data cache
If there is a data cache and if the instruction PLD is implemented in your processor, then yes, you can.
I really have no mechanism (instruction intrinsic capability) to directly control the processing of data
Wrong. The C programming language gives you plenty of ways to control processing of data: variables, pointers, operators and so on.
unless I want to get down into a kernel level type control
What kernel? An OS kernel? Which OS? How is this related to the PLD instruction?
Are there any intrinsics you are aware of that can provide a more direct control of the data cache if required?
You probably mean 'instructions' rather than intrinsics. For those you'll have to go to the arm.com website and download the reference manual for your processor.
OK Mike, Thanks. I clearly have alot more to research on this subject.
In case anyone else is interested, here is a pretty good chapter on the subject. While not specifically for ARM, it still provides an in-depth explanation on the subject of prefetching:
download.intel.com/.../excerpt_swcb1.pdf