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Program failure at 80+ degrees

Hello,

I was hoping to hear your opinion about a serious problem I have - it is either I solve it or reduce my LPC2478 CPU speed from 72[MHz] to 64[MHz] (11% loss. The problem does not seem to be occurring at lower MHz settings). I posted about this in the past but it was a long time ago.
When I place a controller in an environmental chamber and increase the temperature to 80+ Celsius degrees, I often see data abort exceptions, and sometimes I get the impression that the PC takes a hike (even the firmware LED that blinks every 1 second becomes irregular for a while before it stops). The program is launched by a boot loader and has a lower level supporting firmware layer that handles some interrupts (not all). I also see that if RTX is not started at all (but the application hangs in a "for (;;)" loop instead, hence the bootloader and firmware layer were/are involved, but the application is idle) - the system never crashes! I have excluded, as far as I could tell, the roll of external memory or RTX in this situation. However, I still suspect RTX a little (even though my test programs never crashed).
My question: did you ever encounter such a situation? Where do I look best? can this be the result of a misbehaving peripheral? NXP have confirmed the LPC2478 is not the reason.

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  • Hello,

    I have learned a little more about this problem in the mean time and was wondering if you can enlighten me further. I am currently running a weekend test of a controller that utilizes the LCD controller of the LPC2478 vs. a controller that does not. The first one is reduced to 64 [MHz] while the second one still runs at 72[MHz], and they communicate via a RS485 bus. Hopefully this remains stable but either way, I have just reduced the display's processing capacity by 12%...
    'Samsung' have promised me that their DRAM (K4S561632J) does not suffer from any issues and that the EMC timing settings used now should apply to the entire range of temperatures (maybe the controller was not warmed up entirely or long enough when I concluded otherwise). I am not sure about the refresh rate, but either way I did try to play with it without any positive results. I am aware that the signals to the DRAM should be measured, but that is not so simple at 80+ degrees.
    The latest LPC24xx data sheet elaborates on the AHBCFGx registers which determine the arbitration of the AHB busses (my LCD, DRAM and peripheral(MCI interface uses GPDMA) hang on AHB1) . This is a very fundamental setting that I have no experience changing. Do you think this could help me out? I did a few tests with a negative result, but I feel that I have not exhausted it. Either way, can you think of another system setting that might influence this particular problem? I have, for now, ruled out bad traces and noise as another controller (without an LCD) uses the same hardware design and accesses to external RAM (MCI DMA) ) does not crash.

Reply
  • Hello,

    I have learned a little more about this problem in the mean time and was wondering if you can enlighten me further. I am currently running a weekend test of a controller that utilizes the LCD controller of the LPC2478 vs. a controller that does not. The first one is reduced to 64 [MHz] while the second one still runs at 72[MHz], and they communicate via a RS485 bus. Hopefully this remains stable but either way, I have just reduced the display's processing capacity by 12%...
    'Samsung' have promised me that their DRAM (K4S561632J) does not suffer from any issues and that the EMC timing settings used now should apply to the entire range of temperatures (maybe the controller was not warmed up entirely or long enough when I concluded otherwise). I am not sure about the refresh rate, but either way I did try to play with it without any positive results. I am aware that the signals to the DRAM should be measured, but that is not so simple at 80+ degrees.
    The latest LPC24xx data sheet elaborates on the AHBCFGx registers which determine the arbitration of the AHB busses (my LCD, DRAM and peripheral(MCI interface uses GPDMA) hang on AHB1) . This is a very fundamental setting that I have no experience changing. Do you think this could help me out? I did a few tests with a negative result, but I feel that I have not exhausted it. Either way, can you think of another system setting that might influence this particular problem? I have, for now, ruled out bad traces and noise as another controller (without an LCD) uses the same hardware design and accesses to external RAM (MCI DMA) ) does not crash.

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