the origin 8051 is 12 clock cycles a machine cycles.
but my mcu is slilab.
most instructions execute in the same number of clock cycles as there are program bytes in the instruction
the design of the simulator conseider this ?
i think not.
Your question was: "Does design of the simulator consider the different instruction timings in different 8051 cores?"
My answer is: "Yes, the design of the simulator does consider the different instruction timings in different 8051 cores."
All clear now?