Wanna to make a FCT equipment to test DDR2,with 5MHZ operator code ratio.Before, testing by ICT(GR2287l) is very unstable. Is code ratio too slew or operator sequency wrong? Have anyone the operation code(C,C++...)? or any application documents? Thank you!
Chip's description: SDRAM DDRII K4T1G084QE-HCE6 128MX8 3ns FBGA60 LT/LF SAMSUNG
If the goal is to test 3ns memory, I think you will have to consider way faster test equipment than a 8051 chip. How about looking at fast programmable logic?