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Hello All,
I am hoping to use the Keil ARM simulator to get a vague idea of how long an ISR takes to execute. The code in the ISR is talking to a memory mapped device that is mapped via the ST Flexible Static Memory Controller (FSMC). Does anyone know if the Keil simulator simulates the wait states etc. for the memory access... i.e. will the numbers I get out be vaguely near the truth?
The clue is in the name there - Keil would know!
The level of support for each chip is stated in its entry in the Device Databas: http://www.keil.com/dd