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memeory settings FX2

I have implemented an SPI interface in Cypress FX2. I have problems in giving the XDATA and CODE. I gave the settings as CODE - 0X80-0X0fff and XDATA 0X1000. But when I program it ,Iam not able to see the SCLK. IS anything wrong with the memory settings .
Thanks.
Vanitha

  • > I have implemented an SPI interface in Cypress FX2.

    How did you implement SPI?
    EZ-USB FX2(LP) doesn't have any on-chip SPI.
    Did you connect an external SPI chip?
    Or, did you trick the UART as this app note shows, or bit banging?

    "SPI Implementation Using Serial Mode 0 on EZ-USB - AN1067"
    www.cypress.com/

    > I have problems in giving the XDATA and CODE. I gave the settings as CODE - 0X80-0X0fff and XDATA 0X1000.

    Did you see any error on the linker log?
    If not, it sounds like fine.

    > But when I program it ,Iam not able to see the SCLK. IS anything wrong with the memory settings .

    Did you see any other trouble than SCLK?
    Other functions - like USB enumeration - works fine?
    Why do you think the trouble is related to the memory setting?

    Information is too short to comment something helpful.

    Tsuneo

  • I have written a software SPI refering the application note AN-1068 from cypress. I did not use the file FW.C and other files that is needed for reenumeration. Should I re enumerate the FX2 for proper functioning ?
    Thanks
    Vanitha

  • The target MCU of AN1068 is the original EZ-USB (Anchor AN2131).
    Therefore, you have to rewrite the code intensively for FX2(LP).

    In this appnote, port C is assigned to the bit-banging port.
    The original EZ-USB maps port C on XDATA area (OUTC: 0x7F98).
    FX2(LP) places it on the register area (IOC: 0xA - bit-addressable).
    It is the reason the code doesn't work.

    Tsuneo

  • I am using port E , I have already replaced OUTC by IOE(0xB1). Now Iam also re enumerating the FX2. I have used TD_Init() and TD_poll() in the coding . Still I have problems .
    Vanitha

  • BIT banging seems to be very slow .I cant se anything on scope.

    vanitha

  • >I am using port E , I have already replaced OUTC by IOE(0xB1).

    Maybe, some bug of your code disturbs it.
    Post your code for the asm routine, spiwritebyte and spireadbyte

    >Now Iam also re enumerating the FX2. I have used TD_Init() and TD_poll() in the coding .

    Re-enumeration is not required, when you don't use USB on FX2.
    As you are testing a short code on MON51 debugger, TD_Init() and TD_poll() is also not required.

    Tsuneo

  • I have code for spibytewrite only .Iam using PORT E.PE.0 is my SCLK and PE.7 is my SDO and PE.3 is my CS.

    ?PR?SPIWRITEBYTE?MODULE segment code
     ?DT?SPIWRITEBYTE?MODULE segment data overlayable
    
     PUBLIC _spiwritebyte, ?_spiwritebyte?BYTE
    
     rseg ?DT?SPIWRITEBYTE?MODULE
     ?_spiwritebyte?BYTE:
     d: ds 1
    
     rseg ?PR?SPIWRITEBYTE?MODULE
    
     CLKHIGH equ 00000001B ;Bitmask to turn clk pin high
     CLKLOW equ  11111110B ;Bitmask to turn clk pin low
     BITHIGH equ 10000000B ;Bitmask to turn out pin high
     BITLOW equ  01111111B ;Bitmask to turn out pin low
    
     IOE XDATA 0xB1 ;7F98H
    
     _spiwritebyte:
    
     mov DPTR,#IOE ;point to IOE
     mov R6, #8 ;set up loop
     loop:
     mov A, R7 ;move data to send to A
     rrc A ;rotate left through carry to send LSB first
     mov R7, A ;save rotated
     movx A, @DPTR ;setup to change bit
     jc highbit ;if bit is high jump
     anl A, #BITLOW ;else set bit low
     sjmp skip ;skip setting bit high
     highbit:
     orl A, #BITHIGH ;set out high and clock
     skip:
     orl A, #CLKHIGH ;set clock bit high
     movx @DPTR, A ;output data
     nop ;may need this to stretch clock high time
     anl A, #CLKLOW ;set clock low
     movx @DPTR, A ;output low clock
     djnz R6, loop ;repeat eight times
     ret
     end
    


    Vanitha

  • I solved the problem finally. The IOE in FX2 is located in direct memory access region. The indirect addressing (movx @DPTR, A ) was causing problem. Simply it can be written as mov 0xB1,A. DPTR is not required as it is used to access external memory.
    Vanitha