This discussion has been locked.

You can no longer post new replies to this discussion. If you have a question you can start a new discussion

undef handler

Hi all,

If the processor tries to go back from the test() function to the main() function, the program counter gets always the wrong address - so that an undef handler occurs.... (processor is searching for an programm code in the sdram...). The whole programm is stored in an external nor flash device (0x10000000).

void test(void)
{
   //do some stuff...
   return;
}

void main(void)
{
   test();
}



The user stack size is 0x800. That's a short part of the disassembly where the jump to the sdram occurs (the next step after 0x100012D4).

According to the map file, the function test() is using the memory space until 0x1000012D8 and the next function starts at 0x100001304. I'm not sure about the space within these two points? All these values are also stored in the nor flash device...


   522: return;
0x100012C8  E7980185  LDR       R0,[R8,R5,LSL #3]
0x100012CC  E3C00001  BIC       R0,R0,#0x00000001
0x100012D0  E7880185  STR       R0,[R8,R5,LSL #3]
   523: }
0x100012D4  E8BD8FF8  LDMIA     R13!,{R3-R11,PC}
0x100012D8  544F5250  DD        0x544F5250
0x100012DC  0050495F  DD        0x0050495F
0x100012E0  0A50490A  DD        0x0A50490A
0x100012E4  00000000  DD        0x00000000
0x100012E8  606E6F64  DD        0x606E6F64
0x100012EC  6E6B2074  DD        0x6E6B2074
0x100012F0  7420776F  DD        0x7420776F
0x100012F4  20736968  DD        0x20736968
0x100012F8  6B636170  DD        0x6B636170
0x100012FC  000A7465  DD        0x000A7465
0x10001300  68746520  DD        0x68746520
0x10001304  00000020  DD        0x00000020
    39:                 pbuf->hdr->flag = used;






best regards

Howard

Parents

0 Howard Garcia over 16 years ago in reply to John Linq

I'm not alone with that problem...

I will try to use the keil startup file together with my lowlevelinit function. So that the only difference between the original keil file and my startup file will be shown below.

; Reset Handler

                EXPORT  Reset_Handler
               IMPORT  LowLevelInit
Reset_Handler


                ; Set pc to actual code location (i.e. not in remap zone)
            LDR     pc, =label
                NOP
label


                ; Set up temporary stack (Top of the SRAM)

                LDR     r0, = Stack_Top                         ; get top of the stack
        MOV     sp, r0                                          ; store top of the stack in register0
                ; Call Low level init
                BL      LowLevelInit
                NOP



; Cache Setup ------------------------------------------------------------------

                IF      ICACHE_SETUP != 0
                MRC     p15, 0, R0, c1, c0, 0   ; Enable Instruction Cache
                ORR     R0, R0, #ICACHE_ENABLE
                MCR     p15, 0, R0, c1, c0, 0
                ENDIF





; Setup Stack for each mode ----------------------------------------------------

                LDR     R0, =Stack_Top

best regards
Howard

Reply

0 Howard Garcia over 16 years ago in reply to John Linq

I'm not alone with that problem...

I will try to use the keil startup file together with my lowlevelinit function. So that the only difference between the original keil file and my startup file will be shown below.

; Reset Handler

                EXPORT  Reset_Handler
               IMPORT  LowLevelInit
Reset_Handler


                ; Set pc to actual code location (i.e. not in remap zone)
            LDR     pc, =label
                NOP
label


                ; Set up temporary stack (Top of the SRAM)

                LDR     r0, = Stack_Top                         ; get top of the stack
        MOV     sp, r0                                          ; store top of the stack in register0
                ; Call Low level init
                BL      LowLevelInit
                NOP



; Cache Setup ------------------------------------------------------------------

                IF      ICACHE_SETUP != 0
                MRC     p15, 0, R0, c1, c0, 0   ; Enable Instruction Cache
                ORR     R0, R0, #ICACHE_ENABLE
                MCR     p15, 0, R0, c1, c0, 0
                ENDIF





; Setup Stack for each mode ----------------------------------------------------

                LDR     R0, =Stack_Top

best regards
Howard

Children

No data