SPI1 interface for LPC2148

Hi There:
I am trying to connect LPC2148 to an external ADC via SPI1 interface. I am using Keil development system and MCB2148 DEVELOPMENT BOARD. I have taken the Keil example and changed for SPI. After I initialize and send CS(SSEL1 PIN 55 on the processor) on the ADC to High I expect to see clock on pin 47, reach my break point in the SPI1_isr(); which I don’t get. Do you see a problem in the set up code?
Any suggestion or ideas? Anyone has similar code for guideline? Thank you for your help in advance.

void SPI1_Init(void)
{

VICVectAddr0 = (unsigned int) &SPI1_Isr;
// Channel0 on Source#11 ... enabled
VICVectCntl0 = 0x2B;

IODIR0 |= 0x00100000; // P0.20 defined
IOCLR0 = 0x00100000; // LTC2351 = 0
// configure SPI1 pins (except SSEL1)
PINSEL1 |= 0x00000028;

// Set up SSP Control Register 0
// CPHA=1, CPOL=0, SPI , 14 BIT DATA, SCR =8 page 186
SSPCR0 = 0x088D;

// Set up SSP Control Register 1
// NORMAL OPERATION, SSP DISABLE,MASTER MODE, SLAVE OUTPUT DISABLE PAGE 187 IN MANUAL
SSPCR1 = 0x02;

// Set up SSP clock prescale register.
// CPSDVSR = 10, previously SCR = 8, BIT FREQ = 1/6 MHZ= PCLK/(CPSDVSR * (SCR+1).
SSPCPSR = 10;

// Set up SSP Intrrupt Mask SET/CLEAR Register
// Rec over run accurs, Rec Timeout condition accurs,Rx FIFO NOT EMPTY.
SSPIMSC = 0x07;

msg = spiBuf;
count = 4; // number of short

// Send dummy write to ger SPI started
SSPDR = 0xFA; // sent first byte
// Show no data is ready for processing.
EXT_ADs_data_Ready_flag =0;

VICIntEnable |= 0x800; // 11th bit is the SPI 1

}

void SPI1_Isr(void) __irq
{ // READ SSP Status register
// Rx FIFO not empty? and no error?
if ((SSPSR & 0x1F) == 0x04)
{ *msg++ = SSPDR; // read data from slave if (--count > 0) // save the data in my SPI array spiBuf[count] = *(msg-1); else { // Take out the SSEL1 (set to LOW) IOCLR0 = 0x00100000;

state = SPI_OK; // transfer completed

// set up message pointer and msg count. msg = spiBuf; count = 4; // number of short

// send resent data for processing EXT_AD_Ch1_Data = spiBuf[0]; EXT_AD_Ch2_Data = spiBuf[1]; EXT_AD_Ch3_Data = spiBuf[2]; EXT_AD_Ch4_Data = spiBuf[3];

// show new data ready. EXT_ADs_data_Ready_flag = 1; }
}

else // SPI error { *msg = SSPDR; // dummy read to clear flags state = SPI_ERROR; }

SSPICR = 0x03; // reset interrupt flag
VICVectAddr = 0; // reset VIC
}