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Hi,
Please help
I have written a c code for LPC2378 microcontroller, inorder to set a timer0 and generate an interrupt whenever the timer overflow occurs and the interrupt is mapped to VIC timer0 vector address 4. The problem is while watching the timer and vector register values.............the overflow is happening finely, the interrupt is generated and notified to the VIC by changing the VIC vector address where the PC has to take control but the pc is not changed to that location to execute the subroutine. Please help me.
Please find my attached code.
#include <stdio.h> #include <LPC23xx.H> /* LPC23xx definitions */ __irq void T0_IRQHandler (void); int main (void) { /* Enable and setup timer interrupt, start timer */ T0MR0 = 10; T0MCR = 3; /* Interrupt and Reset on MR0 */ T0TCR = 1; /* Timer0 Enable */ T0PR = 10; /* Timer0 Enable */ VICVectAddr4 = (unsigned long)T0_IRQHandler;/* Set Interrupt Vector */ VICVectCntl4 = 15; /* use it for Timer0 Interrupt priority is 5*/ VICIntEnable = (1 << 4); /* Enable Timer0 Interrupt */ while(1) { } }
/* Import function for turning LEDs on or off */ /* Timer0 IRQ: Executed periodically */
__irq void T0_IRQHandler (void) { static int clk_cntr; clk_cntr++; if (clk_cntr >= 1000) { clk_cntr = 0; /* Activate flag every 1 second */ } T0IR = 1; /* Clear interrupt flag */ VICVectAddr = 0; /* Acknowledge Interrupt */ }
Hi Mohana,
For your own codes, as Chris Burrows said, you should do two things first:
1. In the startup code You need to have the following instruction located at the IRQ Vector (0x0000 0018):
LDR PC, [PC, #-0x0120]
2. 10 is way too small. The system may be being swamped by interrupts. My LPC2378 interrupt example written in Oberon-07 works OK and in that I have set T1MR0 := 100000.
T0MR0 = 100000;
About your case, there are a lot of things I don't understand.
The problem is while watching the timer and vector register values the overflow is happening finely, the interrupt is generated and notified to the VIC by changing the VIC vector address where the PC has to take control but the pc is not changed to that location to execute the subroutine.
In the user mode both the FIQ and IRQ's are disabled by setting the CPSR register IRQ and FIQ bit by 1.
1. If YOU DISABLED IRQ and FIQ, why Timer0 ISR should work for You?
2. What does "the overflow is happening finely" mean?
3. How did you know "the interrupt is generated and notified"? What did you check?
4. "but the pc is not changed to that location", then, where was the PC pointing to?
5. You should check the Timer Example from NXP to see what is:
Step 1. Initialize the VIC Step 2. Disable Timer0 Interrupt Step 3. Set and Enable Timer0 Interrupt
6. "I have given the vector priority for timer0 interrupt as 5." Both Chris Burrows and me don't think so.
7. You should consider why "T0MR0 = 10;" is too small; and why the steps are necessary.
7.1 What is your CCLK/PCLK? 7.2 Were there other Interrupts triggered? 7.3 What if you are changing Timer0 Interrupt, and Timer0 Interrupt is triggered?
[ Insider's Guide NXP LPC2300/2400 ] On entry to the IRQ Mode, the I bit in the CPSR is set, causing the IRQ interrupt line to be disabled.