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Start up code for lpc2378

I am having an olimex board LPC-2378STK (link to the site where information about the board is : www.olimex.com/.../index.html). I have a start up code LPC2300.s which the keil uvision generated. But it is getting stuck at a particular point while I am debugging using ulink debugger. I don't know what the problem is . Can any please give me working startup code for lpc2378 because I don't know how to debug a startup code. Can anyone please help me ,( I don't have enough time to study the startup code and generate it myself since my deadline is fast approaching Thankyou....

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  • It's quite reasonable that the two reset bits clears themselves. After all, the datasheet says that the bits are self-clearing, so you do not need to write a second time to this register, to clear the bits.

    It's a bit interesting that it switches from 1-ch rx FIFO to 14-ch FIFO.

    On the other hand, the datasheet does say
    "Table 344. UARTn FIFO Control Register (U0FCR - address 0xE000 C008,
    U2FCR - 0xE007 8008, U3FCR - 0xE007 C008, Write Only) bit description"

    Since it is a write-only register, the datasheet doesn't really tell what the Keil debugger should return if you read from this address - any read results should after all be seen as undefinied.

    What do you expect Keil to do?
    - always return zero, even if it isn't documented that the real processor does that?
    - return the current state of the UART, even if it isn't documented that the real processor does that?
    - generate an exception of you read from the byte, even if the real processor doesn't do that?
    - reverse-engineer the behaviour of a real chip, and try to duplicate it, even if a different stepping of the processor may do something else?
    - something else?

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  • It's quite reasonable that the two reset bits clears themselves. After all, the datasheet says that the bits are self-clearing, so you do not need to write a second time to this register, to clear the bits.

    It's a bit interesting that it switches from 1-ch rx FIFO to 14-ch FIFO.

    On the other hand, the datasheet does say
    "Table 344. UARTn FIFO Control Register (U0FCR - address 0xE000 C008,
    U2FCR - 0xE007 8008, U3FCR - 0xE007 C008, Write Only) bit description"

    Since it is a write-only register, the datasheet doesn't really tell what the Keil debugger should return if you read from this address - any read results should after all be seen as undefinied.

    What do you expect Keil to do?
    - always return zero, even if it isn't documented that the real processor does that?
    - return the current state of the UART, even if it isn't documented that the real processor does that?
    - generate an exception of you read from the byte, even if the real processor doesn't do that?
    - reverse-engineer the behaviour of a real chip, and try to duplicate it, even if a different stepping of the processor may do something else?
    - something else?

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