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Interrupt numbering

I have noticed that the Kiel compiler doesn't produce the correct interrupt vector if 8051 interrupt numbers are used. For example for external interrupt 0 (IE0), the interrupt number has to be 0, instead of 1 to produce a jump at location 1. Example:

void edge1 (void) interrupt 0{ /*produces correct code

while

void edge1 (void) interrupt 1{ /*produces wrong code

This is the case with all the interrupts I have used. My questions is what do you have to do to produce a reset vector? Reset is interrupt number 0 in 8051 numbering. Using -1 or 255 both produce a compile error.

Parents
  • "I find Keil's manuals and on-line documentation mostly don't supply the information I'm looking for"
    This is, of course, not 'love' but I could not help quoting the old song.

    Keil, by default can NOT document anything more than the behaviour of their tools. I can hardly think of one thing in the '51 architecture that some derivative does not do differently. Thus there can be no expectation whatsoever that Keil document anything about the behaviour of the hardware in reaction to the code produced by Keil.

    It is not uncommon for those that has not understood that "the '51 ain't no PC" to expect a congruence between hardware and software documentation (let alone look for one in the manual of the other). However with the plethora of manufacturers of '51s that each put their own spin on the chip to separate them from the competition it would be ridiculous to expect any such congruence (do you remember the '751 that did not decode ljmps or the derivative where the T2 IE bit was located elsewhere). In the case of single manufacturer chips such as the PIG, congruence will, of course, be possible as well.

    Erik

Reply
  • "I find Keil's manuals and on-line documentation mostly don't supply the information I'm looking for"
    This is, of course, not 'love' but I could not help quoting the old song.

    Keil, by default can NOT document anything more than the behaviour of their tools. I can hardly think of one thing in the '51 architecture that some derivative does not do differently. Thus there can be no expectation whatsoever that Keil document anything about the behaviour of the hardware in reaction to the code produced by Keil.

    It is not uncommon for those that has not understood that "the '51 ain't no PC" to expect a congruence between hardware and software documentation (let alone look for one in the manual of the other). However with the plethora of manufacturers of '51s that each put their own spin on the chip to separate them from the competition it would be ridiculous to expect any such congruence (do you remember the '751 that did not decode ljmps or the derivative where the T2 IE bit was located elsewhere). In the case of single manufacturer chips such as the PIG, congruence will, of course, be possible as well.

    Erik

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