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SPI wont idle low. STM32F103VET6

Neil Radnitz

Hi.

I have probably overlooked something very basic here. For some reason my SPI brings up a mode fault, just after I enable the peripheral whenever I try get get it to idle low.

If I idle high or change any of the other switches (polarity, baud etc) it works fine.

I don't suppose anyone has come across this problem?

Parents
  • 0 in reply to Cpt. Vince

    I assume here that NSS is the slave-select signal.

    Slave select is always a problem. Some chips wants the select for each individual byte. Some chips wants it for a full packet. Some chips have specific timing requirements for activation and/or deactivation of the signal.

    Alas, the SPI master almost always have too few options for automatically controlling the slave select.

Reply
  • 0 in reply to Cpt. Vince

    I assume here that NSS is the slave-select signal.

    Slave select is always a problem. Some chips wants the select for each individual byte. Some chips wants it for a full packet. Some chips have specific timing requirements for activation and/or deactivation of the signal.

    Alas, the SPI master almost always have too few options for automatically controlling the slave select.

Children
  • 0 in reply to ImPer Westermark

    Yup "NSS" is the slave select. I don't mind if the Slave Select signal doesn't comply with the "standard", but only if it is documented not to do so. ST Microelectronics' data-sheets don't actually tell you that it doesn't work. You have to discover that yourself: and go to their forums and find out that other people have had the same problem. The Age-Old 'undocumented feature' issue.

    Although SPI is an interface 'standard' I am amused on how many variations there are in capability and functionality on both the master and slave ends of the 'standard' communications.

    --Cpt. Vince Foster
    2nd Cannon Place
    Fort Marcy Park, VA

  • 0 in reply to Cpt. Vince

    Thanks for the feedback.

    I actualy found the problem just after I sent this thread. As I said origionaly I probably overlooked something.

    Section 18.3.8 on page 423 of the reference manual states "Master Mode fault occurs when the master device has its NSS pin pulled low (in hardware mode) or SSI bit low (in software mode), this automaticaly sets the MODF bit".

    We are the using the SPI to communicate to multiple devices so the NSS pin is just floating in this project. I made the incorrect assumption that keeping it low in my port setup would be sufficient.

    I have adjusted the NSS pin to read high and it now works on low polarity.

    I am still worried about this, I would think from the statement above it should not work in either polarity states. I am reading further to make sure there isn't something else I have missed.