Hi: I have read one of the app note that keil provided "in-system flash programming" (http://www.keil.com/support/docs/2364.htm) and became confused. In my opinion, the uC core can only fetch instruction from rom or flash. But as the app note said, the code can be execuated in ram(using srom class). The way of copy the code from flash to ram can be easily understand, but how can it execuate there. In my opinion, the process of how to fetch instruction is only decided by the core construction, but not the complier or linker tools. what is the real instruction fetch mechanism about 51MCU. Is there any document related ? I do not know search what key point for this question. Thaks for your help.
aaa1982
Hi Andy:
You are asking questions that rely upon specific details about specific chips - you cannot just rely on vague recollections on unspecified documentation!
Take C8051F3xx for example. Look at the Global Electrical Characteristics at P28 of the datasheet(c8051f320).
CPU Active (Normal Mode, fetching instructions from Flash) VDD = 3.3 V, F = 24 MHz Typical current=10.6mA CPU Inactive (Idle Mode, not fetching instructions from Flash) VDD = 3.3 V, F = 24 MHz Typical current=5.2mA
I just want to know , when I use an external ram (C8051f320 do not support but c8051f340 support).If it can copy the code from flash to ram at beginning and run the code at ram. If it can working, whether it will save power versus fetch the instruction from flash.
Now it is an actual question rely on an specific MCU(c8051f340).
Thanks for your replying
Jason
"If it can copy the code from flash to ram"
Remember: the CPU knows nothing about "flash" or "RAM" - all it knows about is CODE and XDATA address spaces.
The CPU can only ever fetch instructions from CODE space - so you need to check the Datasheet to see if this chip has any facility to map CODE space onto the external RAM.
"If it can working, whether it will save power versus fetch the instruction from flash."
Only the specific Datasheet can tell you that.
It seems unlikely unless this chip gives you some facility to power-down the Flash when you're not using it - again, only the specific Datasheet can tell you that.
These are chip-specific hardware details; nothing to do with the Keil software tools. For detailed chip-specific questions like this, you need to be talking to the Chip Manufacturer - ie, Silicon Labs - not the software tool vendor (Keil).
What does "Idle Mode" mean...?
It means whatever the specific datasheet defines it to mean! One might hope that any given manufacturer would use a consistent definition across their product range - but there's no reason to assume that different manufacturers would necessarily choose the same definition!
You are reading: "CPU Active (Normal Mode, fetching instructions from Flash)"
while I think you should read:
"CPU Active (Normal Mode, fetching instructions from Flash)"
The big current consumption is from the CPU core running instructions, not from the flash being powered.
It is only when "PU Inactive (Idle Mode, not fetching instructions from Flash)"
that the core is using so little power that you may gain a good extra power save by cutting the power to the flash. But that requires that the CPU does have such an option.
when I use an external ram (C8051f320 do not support but c8051f340 support). The SILabs chips do not support external CODE memory. it is not a matter of RAM/ROM/flash ... it is a matter of CODE memory.
Erik