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Atomicity

Hakan YAMANYAR

Is the operation below an atomic operation in a multitasking environment like RTX-51? If it is not, then what is supposed to do to make it an atomic one except using locking mechanisms?

void func()
{
  int locVal = globalVal++;
  ...
  ...
}

Parents
  • 0 in reply to Christoph Franck

    If it can't be completed in a single instruction then it is non-atomic?

    Let me throw one more thing into the mix. On the C166 architectire, the MULx and DIVx instructions are interruptible. The ISR must save the intermediate state of multiplication/division if it intends to execute MULx or DIVx. In a way, it means that even single instructions can be non-atomic.
    As for the whole discussion, I think the answers can only be as good as the questions. The concept of 'atomicity' is too vague to be applied to all CPU's in general and to the C programming language. You have to ask more specific questions.
    By the way, the language itself (C90 and C99) has no concept of 'atomicity'. Somewhat related are the keyword volatile and the concept of 'sequence points.'

Reply
  • 0 in reply to Christoph Franck

    If it can't be completed in a single instruction then it is non-atomic?

    Let me throw one more thing into the mix. On the C166 architectire, the MULx and DIVx instructions are interruptible. The ISR must save the intermediate state of multiplication/division if it intends to execute MULx or DIVx. In a way, it means that even single instructions can be non-atomic.
    As for the whole discussion, I think the answers can only be as good as the questions. The concept of 'atomicity' is too vague to be applied to all CPU's in general and to the C programming language. You have to ask more specific questions.
    By the way, the language itself (C90 and C99) has no concept of 'atomicity'. Somewhat related are the keyword volatile and the concept of 'sequence points.'

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