This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Driver for Primecell ARM PL241

Hi,

May be this topic is a little out of the scope of this forum.

Anyways my heartiest thanks to anyone who helps me solving the below issue.

I am trying to write driver for ARM primecell PL241 memory controller. My external memory device to be connected is a flash SST39VF040.

I am having difficulty in understanding as what operation should my code do for the below algorithm given in the TRM for iniitalization.

1. Issue a direct_cmd by writing command information to SMC direct command register, that must include the match data value.
2. Perform the required sequence of memory accesses, the last access containing the match data value

The bit field details of the direct command registers are as follows
[b][25:23] [/b]chip_select Selects chip configuration register bank to update and enables chip mode register access depending
on cmd_type. The encoding is:
b000-b011 = chip selects 1-4 on interface 0
b100-b111 = reserved.
[22:21] cmd_type Determines the current command. The encoding is:
b00 = UpdateRegs and AHB command
b01 = ModeReg access
b10 = UpdateRegs
b11 = ModeReg and UpdateRegs.
[20] set_cre Maps to configuration register enable, smc_cre, output, when a ModeReg command is issued. The
encoding is:
b0 = smc_cre is LOW
b1 = smc_cre is HIGH when ModeReg write occurs
[19:0] addr Bits mapped to external memory address bits [19:0] when command is ModeReg access.
Addr[19:16] are undefined.
Addr[15:0] matches wdata[15:0] when the commands are UpdateRegs and AHB command access.

Could any one please explain me the above two bolded points in the steps of the algorithm.
And what value should i set for ADDR field.

If any one has any code or application note on PL241 kindly share with me.

The links for the PL241 TRM is infocenter.arm.com/.../DDI0389.pdf
Kindly refer to page numbers 92 and 70 for the above said queries.

Thanks a lot in Advance,
Syed

0