Even after including the header file for the syncdelay,i,e "fx2sdly.h" iam getting an error c202 unknown identifier . iam developing a firm ware for fx2. also i need binary file to download the firm ware . is there a way to generate binay file from keil. i have a board with cypress fx2 and spartan. can any help
* after you build successfully, use hex2bin. * give more details.
Iam new to keil c . i have included a macro syncdelay for my firmware design for fx2 usb. when I build. iam getting an error . unknown identifier syncdelay. i have included the header file for the Macro. thanks . ihave downloaded the utility hex2bin thanks punitha
copy paste your error message as well as the relevant code snippet. we are not mind readers, maaaaaaan!!! :-)
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hai ,
this is my error
: error C202: 'SYNCDELAY': undefined identifier : error C202: 'SYNCDELAY': undefined identifier
i have included the header files as given below
#include "fx2.h" #include "fx2regs.h" #include "fx2sdly.h" // SYNCDELAY macro, see Section 15.14 of FX2 Tech. // Ref. Manual for usage details. syncdelay is a macro and i have includes the header file "fx2sdly.h". still the error is not gone .? what is wrong ?the coding is for GPIF design for the cypress usb
punitha
has it ever occurred to you that it might be important to post the macro itself and where and how it is used? you continuously refuse to post anything meaningful.
What have you set _IFREQ and _CFREQ to? What does _SCYCL evaluate to?
//----------------------------------------------------------------------------- // File: fx2sdly.h // Contents: EZ-USB FX2 Synchronization Delay (SYNCDELAY) Macro // // Enter with _IFREQ = IFCLK in kHz // Enter with _CFREQ = CLKOUT in kHz // // Copyright (c) 2001 Cypress Semiconductor, All rights reserved //----------------------------------------------------------------------------- #include "intrins.h" // Registers which require a synchronization delay, see section 15.14 // FIFORESET FIFOPINPOLAR // INPKTEND OUTPKTEND // EPxBCH:L REVCTL // GPIFTCB3 GPIFTCB2 // GPIFTCB1 GPIFTCB0 // EPxFIFOPFH:L EPxAUTOINLENH:L // EPxFIFOCFG EPxGPIFFLGSEL // PINFLAGSxx EPxFIFOIRQ // EPxFIFOIE GPIFIRQ // GPIFIE GPIFADRH:L // UDMACRCH:L EPxGPIFTRIG // GPIFTRIG // Note: The pre-REVE EPxGPIFTCH/L register are affected, as well... // ...these have been replaced by GPIFTC[B3:B0] registers // _IFREQ can be in the range of: 5000 to 48000 #ifndef _IFREQ #define _IFREQ 48000 // IFCLK frequency in kHz #endif // CFREQ can be any one of: 48000, 24000, or 12000 #ifndef _CFREQ #define _CFREQ 48000 // CLKOUT frequency in kHz #endif #if( _IFREQ < 5000 ) #error "_IFREQ too small! Valid Range: 5000 to 48000..." #endif #if( _IFREQ > 48000 ) #error "_IFREQ too large! Valid Range: 5000 to 48000..." #endif #if( _CFREQ != 48000 ) #if( _CFREQ != 24000 ) #if( _CFREQ != 12000 ) #error "_CFREQ invalid! Valid values: 48000, 24000, 12000..." #endif #endif #endif // Synchronization Delay formula: see TRM section 15-14 #define _SCYCL ( 3*(_CFREQ) + 5*(_IFREQ) - 1 ) / ( 2*(_IFREQ) ) #if( _SCYCL == 1 ) #define SYNCDELAY _nop_( ) #endif #if( _SCYCL == 2 ) #define SYNCDELAY _nop_( ); \ _nop_( ) #endif #if( _SCYCL == 3 ) #define SYNCDELAY _nop_( ); \ _nop_( ); \ _nop_( ) #endif #if( _SCYCL == 4 ) #define SYNCDELAY _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ) #endif #if( _SCYCL == 5 ) #define SYNCDELAY _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ) #endif #if( _SCYCL == 6 ) #define SYNCDELAY _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ) #endif #if( _SCYCL == 7 ) #define SYNCDELAY _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ) #endif #if( _SCYCL == 8 ) #define SYNCDELAY _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ) #endif #if( _SCYCL == 9 ) #define SYNCDELAY _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ) #endif #if( _SCYCL == 10 ) #define SYNCDELAY _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ) #endif #if( _SCYCL == 11 ) #define SYNCDELAY _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ) #endif #if( _SCYCL == 12 ) #define SYNCDELAY _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ) #endif #if( _SCYCL == 13 ) #define SYNCDELAY _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ) #endif #if( _SCYCL == 14 ) #define SYNCDELAY _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ) #endif #if( _SCYCL == 15 ) #define SYNCDELAY _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ) #endif #if( _SCYCL == 16 ) #define SYNCDELAY _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ); \ _nop_( ) #endif
hai mike , thanks . iam having a diiferent file for the syncdelay macro where the codings are different from what u have given. and it is given as writedelay ( )instead of syncdelay. Thanks i found where iam wrong . thanks punitha