Calculation of stack sizes...

> I still have some questions; this is really difficult to understand,
> My platform is NXP LPC2378, which is an ARM7TDMI-S CPU (ARMv4T), with
> a 128-bit wide memory interface and an accelerator architecture.

That is proprietary external hardware to prefetch data from flash. Not
what I was talking about. See below.

> LDRD and STRD instructions are only available in ARM Architecture 5TE
> and later. So, I guess this means LDRD and STRD instructions are
> useless to me?

Useless is probably the wrong word... If you use them on ARM7TDMI
you'll likely get an UNDEF exeception.

> => NB: Some ARM cores feature 64bit memory interfaces. These benefit
> from 8-byte aligned 64bit data access for performance reasons, despite
> the fact that most actually allow unaligned doubleword access :-) <=
>
> So, does this mean, 8-byte aligned memory access still benefits
> performance in a LPC2378?

At least not in the sense that I was referring to. My memory interface
sits between core and the rest of the world as the core sees it. This
is certainly not wider than 32 bits on ARM7TDMI.

> 5.2.1.1
> Universal stack constraints
> SP mod 4 = 0. The stack must at all times be aligned to a word boundary.
>
> 5.2.1.2
> Stack constraints at a public interface
> SP mod 8 = 0. The stack must be double-word aligned.
>
> Does this mean, "the stack must be double-word aligned" is not
> mandatory in ARM ABI?

Mandatory only at "externally visible boundaries", i.e. your public
API or your own references to third party code (libraries).

Example: Code calling your code might expect 8-byte aligned stack. If
you violate that, things won't work. Since you can't know what someone
else might expect, you have no choice but comply.

Silly example: Your function calls third party code. A strange way of
saying NOP (most ARM architectures don't have an actual NOP
instruction) is by saying

BIC sp, sp, #7

somewhere in the subroutine. This shouldn't have any visible effect
provided that the stack was properly aligned when you where calling
the subroutine. Violating the stack alignment contract would break
your program.

Exceptions: Internal functions, that are not supposed to be used by
anyone else and are not calling any functions themselves but your own
(assuming you know what you are doing), may leave the stackpointer
unaligned.

ISRs must generally not rely on an aligned stack and may have to
ensure an aligned stackpointer if they are calling other functions.

> Does REQUIRE8 mean that an obj-file certainly uses LDRD and STRD
> instructions? or it does not?

First of all REQUIRE8 is just a claim.

> Even the KEIL's library does not align and grow the stack in 8-byte
> steps, so I guess that, To be ABI compliant is not very important?

This is not true. ABI compliance is utterly important.

Regards
Marcus
http://www.doulos.com/arm/

> I still have some questions; this is really difficult to understand,
> My platform is NXP LPC2378, which is an ARM7TDMI-S CPU (ARMv4T), with
> a 128-bit wide memory interface and an accelerator architecture.

That is proprietary external hardware to prefetch data from flash. Not
what I was talking about. See below.

> LDRD and STRD instructions are only available in ARM Architecture 5TE
> and later. So, I guess this means LDRD and STRD instructions are
> useless to me?

Useless is probably the wrong word... If you use them on ARM7TDMI
you'll likely get an UNDEF exeception.

> => NB: Some ARM cores feature 64bit memory interfaces. These benefit
> from 8-byte aligned 64bit data access for performance reasons, despite
> the fact that most actually allow unaligned doubleword access :-) <=
>
> So, does this mean, 8-byte aligned memory access still benefits
> performance in a LPC2378?

At least not in the sense that I was referring to. My memory interface
sits between core and the rest of the world as the core sees it. This
is certainly not wider than 32 bits on ARM7TDMI.

> 5.2.1.1
> Universal stack constraints
> SP mod 4 = 0. The stack must at all times be aligned to a word boundary.
>
> 5.2.1.2
> Stack constraints at a public interface
> SP mod 8 = 0. The stack must be double-word aligned.
>
> Does this mean, "the stack must be double-word aligned" is not
> mandatory in ARM ABI?

Mandatory only at "externally visible boundaries", i.e. your public
API or your own references to third party code (libraries).

Example: Code calling your code might expect 8-byte aligned stack. If
you violate that, things won't work. Since you can't know what someone
else might expect, you have no choice but comply.

Silly example: Your function calls third party code. A strange way of
saying NOP (most ARM architectures don't have an actual NOP
instruction) is by saying

BIC sp, sp, #7

somewhere in the subroutine. This shouldn't have any visible effect
provided that the stack was properly aligned when you where calling
the subroutine. Violating the stack alignment contract would break
your program.

Exceptions: Internal functions, that are not supposed to be used by
anyone else and are not calling any functions themselves but your own
(assuming you know what you are doing), may leave the stackpointer
unaligned.

ISRs must generally not rely on an aligned stack and may have to
ensure an aligned stackpointer if they are calling other functions.

> Does REQUIRE8 mean that an obj-file certainly uses LDRD and STRD
> instructions? or it does not?

First of all REQUIRE8 is just a claim.

> Even the KEIL's library does not align and grow the stack in 8-byte
> steps, so I guess that, To be ABI compliant is not very important?

This is not true. ABI compliance is utterly important.

Regards
Marcus
http://www.doulos.com/arm/

Hi Marcus,

Many thanks for your explaination.