External memory write problem

I am using STR912WA44 arm CPU. I am trying to access to an external SRAM. While writing data to SRAM, chip select and
read enable signal are acting correctly, however while writing into this external memory, there is no chip select signal and write enable signal. (I view signal status with ossiloscope while read and write). I think there is a configuration problem. So I need your help.
The test code is as follows:

#include "91x_lib.h"

typedef enum { FAILED = 0, PASSED = !FAILED} TestStatus;

GPIO_InitTypeDef  GPIO_InitStructure;
EMI_InitTypeDef   EMI_InitStruct;
u8 Buffer_Write[32] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09,
                       0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10, 0x11, 0x12,
                       0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B,
                       0x1C, 0x1D, 0x1E, 0x1F, 0x20};
u8 Buffer_Read[32];
TestStatus TransferStatus;
u32 k = 0;

void MCLK_Config (void);
void SCU_Configuration(void);
void GPIO_Configuration(void);
TestStatus Buffercmp(u8* pBuffer1, u8* pBuffer2, u16 BufferLength);


int main()
{

  /*CPU running @96MHZ*/
  MCLK_Config ();

  /* Configure the system clocks */
  SCU_Configuration();

  /* Configure the GPIO ports */
  GPIO_Configuration();

  /* EMI default configuration : Reset configuration*/
  EMI_DeInit();

  /**************************EMI configuration*********************************/

  EMI_StructInit(&EMI_InitStruct);

  /* Number of bus turnaround cycles added between read and write accesses.*/
  EMI_InitStruct.EMI_Bank_IDCY = 0x03 ;

  /* Number of wait states for read accesses*/
  EMI_InitStruct.EMI_Bank_WSTRD = 0x03 ;

  /* Number of wait states for write accesses*/
  EMI_InitStruct.EMI_Bank_WSTWR = 0x03 ;

  /*Output enable assertion delay from chip select assertion*/
  EMI_InitStruct.EMI_Bank_WSTROEN = 0x00;

  /*Write enable assertion delay from chip select assertion*/
  EMI_InitStruct.EMI_Bank_WSTWEN = 0x00;

  /*This member Controls the memory width*/
  EMI_InitStruct.EMI_Bank_MemWidth = EMI_Width_Byte;

  /*Write protection feature */
  EMI_InitStruct.EMI_Bank_WriteProtection =  EMI_Bank_NonWriteProtect;

  /* Normal mode read*/
  EMI_InitStruct.EMI_PageModeRead_Selection =  EMI_NormalMode;

  /*Use Bank0 (CS0)*/
  EMI_Init( EMI_Bank0, &EMI_InitStruct);


  while (1)
  {


    /*Write in external memory*/

    for (k = 0; k < 32; k++)

      *(u8*)(0x3C000000 + k) = Buffer_Write[k] ;

    /*Read from external memory*/

    for (k = 0; k < 32; k++)

      Buffer_Read[k] = *(u8*)(0x3C000000 + k)  ;

    /*Comparaison*/

    /* Check the received data with the send ones */
    TransferStatus = Buffercmp(Buffer_Write, Buffer_Read, 32);

  }

}
void SCU_Configuration(void)
{
  /* Enable the clock for EMI*/
  SCU_AHBPeriphClockConfig(__EMI | __EMI_MEM_CLK, ENABLE);
  SCU_EMIBCLKDivisorConfig(SCU_EMIBCLK_Div1);

  /*Enable the Non-mux mode*/
  SCU_EMIModeConfig(SCU_EMI_DEMUX);

  /* Enable the GPIO7 Clock */
  SCU_APBPeriphClockConfig(__GPIO7 , ENABLE);

  /* Enable the GPIO5 Clock */
  SCU_APBPeriphClockConfig(__GPIO5 , ENABLE);

}

void GPIO_Configuration(void)
{
  /* GPIO8,GPIO9 Configuration*/

  GPIO_EMIConfig(ENABLE);

  /* GPIO7 Configuration */
  GPIO_DeInit(GPIO7);
  GPIO_InitStructure.GPIO_Direction = GPIO_PinOutput;
  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 |
                                GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_6;
  GPIO_InitStructure.GPIO_Type = GPIO_Type_PushPull;
  GPIO_InitStructure.GPIO_Alternate = GPIO_OutputAlt2 ;
  GPIO_Init (GPIO7, &GPIO_InitStructure);

  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7;

  /*EMI-A7 mode 8bits*/
  GPIO_InitStructure.GPIO_Alternate = GPIO_OutputAlt3;

  GPIO_Init (GPIO7, &GPIO_InitStructure);

  /* GPIO5 Configuration */
  GPIO_DeInit(GPIO5);
  GPIO_InitStructure.GPIO_Direction = GPIO_PinOutput;
  GPIO_InitStructure.GPIO_Pin =  GPIO_Pin_4 ;
  GPIO_InitStructure.GPIO_Type = GPIO_Type_PushPull;
  GPIO_InitStructure.GPIO_IPInputConnected = GPIO_IPInputConnected_Disable;
  GPIO_InitStructure.GPIO_Alternate = GPIO_OutputAlt3;
  GPIO_Init (GPIO5, &GPIO_InitStructure);
}
void MCLK_Config (void)

{
  FMI_Config(FMI_READ_WAIT_STATE_2, FMI_WRITE_WAIT_STATE_0, FMI_PWD_ENABLE, \ 
             FMI_LVD_ENABLE, FMI_FREQ_HIGH); /* FMI Wait States */

  SCU_PLLFactorsConfig(192, 25, 2);        /* Configure Factors FPLL = 96MHz */
  SCU_PLLCmd(ENABLE);
  SCU_MCLKSourceConfig(SCU_MCLK_PLL);
  SCU_PCLKDivisorConfig(SCU_PCLK_Div2);  /* ARM Peripheral bus divisor*/
}

TestStatus Buffercmp(u8* pBuffer1, u8* pBuffer2, u16 BufferLength)
{
  while (BufferLength--)
  {
    if (*pBuffer1 != *pBuffer2)
    {
      return FAILED;
    }

    pBuffer1++;
    pBuffer2++;
  }

  return PASSED;
}