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i2c simulator interrupt problem

For the STM32F101 uC, the reference manual states that an interrupt is generated on I2C whenever the ADDR bit is set in Master mode, after the uC sends and address and it is acknowledged by the slave. But... I never see this interrupt in the simulator, even though the debugger logic analyzer shows the ADDR bit being set. I see other interrupts, both ITBUFEN and ITEVTEN are set, and the I2C write proceeds without errors - but why doesn't the ADDR interrupt happen?

Cheers --Kurt

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