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Debugger Bug ??? (FastGPIO on NXP)

Having had problems in the past trying to debug FastGPIO, I recently tried again.

I've just spent a considerable amount of time isolating what I believe to be another interesting (and frustrating) bug in the uVision debugger. I hope this may save someone else some time...

I'm using MDK v3.20 targetting an NXP LPC2142. When I try to initialise FastGPIO, the debugger shows some very odd behaviour. Basically, the FIO0DIR register appears to change its contents following execution of an instruction that does not reference it. I say appears because I am convinced this is a debugger bug rather than a hardware problem.

A fragment of my c source looks like this :-

  // Enable FastGPIO on both I/O ports
  SCS |= (GPIO0M | GPIO1M);

  // Set masks
  FIO0MASK = ~CPLD_P0_OUTPUTS;
  FIO1MASK = DATA_BUS_MASK;

  // Set Port 0 designated bit directions
  FIO0DIR = CPLD_P0_OUTPUTS;

With optimisation set to Level 3, this results in the following generated code :-

    97:   SCS |= (GPIO0M | GPIO1M);
    98:
    99:   // Set masks
0x00004FF4  4935      LDR       R1,[PC,#0x00D4]
0x00004FF6  6A08      LDR       R0,[R1,#0x20]
0x00004FF8  2203      MOV       R2,#0x03
0x00004FFA  4310      ORR       R0,R2
0x00004FFC  6208      STR       R0,[R1,#0x20]
   100:   FIO0MASK = ~CPLD_P0_OUTPUTS;
0x00004FFE  4934      LDR       R1,[PC,#0x00D0]
0x00005000  4834      LDR       R0,[PC,#0x00D0]
0x00005002  6101      STR       R1,[R0,#0x10]
   101:   FIO1MASK = DATA_BUS_MASK;
   102:
   103:   // Set Port 0 designated bit directions
0x00005004  4934      LDR       R1,[PC,#0x00D0]
0x00005006  6301      STR       R1,[R0,#0x30]
   104:   FIO0DIR = CPLD_P0_OUTPUTS;
   105:
0x00005008  4931      LDR       R1,[PC,#0x00C4]
0x0000500A  43C9      MVN       R1,R1
0x0000500C  6001      STR       R1,[R0,#0x00]

Following single-stepping of the line at 0x00005000, which loads into R0 the base address for the Port 0 FastGPIO registers (0x3FFFC000), the FIO0DIR register (as shown in the peripheral dialog) changes to this same value (0x3FFFC000) !

When I subsequently single-step the line at 0x0000500C which should change the value in the FIO0DIR register, it is not shown to change. I can change it directly by editing it in the peripheral dialog.

This does not happen with optimisation set to Level 0.

Needless to say, when you can't depend on the debugger, debugging is made somewhat more difficult :-)

Can anyone else (Keil ?) confirm, refute or explain this behaviour ?

Regards,

David

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  • David;
    I am using Ulink2 and here is my tool set versions.
    I still have the problem. The step number on my NXP LPC2378 chip is BY. So, I think I have the latest of everything including the latest problem.
    I plan to call tech support again on Monday.
    I have used Keil software for quite a number of years and I have seen a problem corrected only to creep back into the code on a later version.
    Of course,I have never had that problem in my code ;-).

    IDE-Version:
    µVision3 V3.60
    Copyright (c) Keil Elektronik GmbH / Keil Software, Inc. 1995 - 2008

    Tool Version Numbers:
    Toolchain: RealView MDK-ARM Version: 3.20
    Toolchain Path: BIN31\
    C Compiler: Armcc.Exe V3.1.0.919
    Assembler: Armasm.Exe V3.1.0.919
    Linker/Locator: ArmLink.Exe V3.1.0.919
    Librarian: ArmAr.Exe V3.1.0.919
    Hex Converter: FromElf.Exe V3.1.0.919
    CPU DLL: SARM.DLL V3.20
    Dialog DLL: DARMP.DLL V1.34
    Target DLL: BIN\UL2ARM.DLL V1.37
    Dialog DLL: TARMP.DLL V1.34

  • The strange behavior while debugging Fast GPIO on NXP is actually caused by a small problem inside the chip which implements the debug access to the Fast GPIO area. Standard debug access to this area will disrupt the contents of Fast GPIO registers. Only debug access to Fast GPIO is affected.

    I have already explained this a while ago in http://www.keil.com/forum/docs/thread11208.asp

    Therefore uVision debugger uses a different approach to access the Fast GPIO in order to bypass the specific chip behavior.

    However under certain circumstances (specific register values while debugger was stopped) another side effect of this chip "feature" caused again the disruption of the Fast GPIO.

    This explains the problem which you have seen and why it disappeared when the optimization level was changed.

    The latest ULINK2 debugger (UL2ARM V1.39 or higher) now bypasses also this side effect and now debugging of Fast GPIO should work without problems.

  • Hi Robert,

    Thanks for the more detailed explanation of the problem.

    As you correctly say, you did explain some of this in the other thread that you referenced. However, there it was claimed that the problem was successfully worked around in UL2ARM.DLL v1.32. It may well have been, but it was broken again in v1.37.0.1 which shipped with MDK v3.20. Hence this thread.

    In v1.39.0.1, which Alexander sent me this morning, it does now appear to be correctly fixed. For reference, I am using the older uLink.

    Thank-you for the quick resolution this time.

  • The original bypass to support Fast GPIO was introduced in V1.32 which worked in most cases.

    However it did not cover another small side effect which occurred in your example and this was fixed in V1.39. Now it should work reliable (no more surprises).

  • Today I received version 1.39 dll from US tech support. It appears to have fixed my problem also.
    Thanks Keil support
    Bradford