Hi all,
This is the first time I've ever played with any microcontroller, and I'm stuck. The goal is to take my processor (I have an ADuC7026 eval board) and expand it with two external chips. I want to interface both, a better set of DACs to it as well as a DDS chip. For these expansions, I made sure to choose chips that are SPI compatible. For now, the question is where do I go from here? Snooping around, at first, I thought I would have to daisy-chain these devices, but it seems like that would be harder to deal with in code. However, it seems like I would be able to use a GPIO pin as a second chip select allowing for two independent slave selects. Is this true? And how would I go about assigning this functionality to a GPIO pin? I'd really appreciate any advice. Thanks in advance.
-Larry
First off: Please educate me. What is a DDS chip?
My contribution: The SPI master only needs to emit clock and data (MOSI and MISO, i.e. master to slave and slave to master). You can connect these three signals to both your slave chips.
Then you can pick two GPIO pins (any GPIO pins) on the master and nd connect them to the slave-select inputs of the two slave chips.
When you want to talk with one slave chip, you activate the first GPIO signal before doing the transfer. When you want to talk with the second SPI chip, you activate the second GPIO signal.
The slave will only care about the clock and data lines if the dedicated slave-select line is activated.
Only one slave at a time can have the slave-select line activated. If both are activated, you will be able to send data to both slaves, but the two slaves interfere with each other about sending data back from slave to master.
There is no corresponding master-select line on the master, since the master does not need any sleect. Being a master, you activate it by activating transfer operations. For each byte sent, you will pick up one byte received.
Thank you very much for that. That's actually very helpful. Firstly (from what I learned just this week), a DDS is a direct digital synthesis. It's just a function generator. I believe, you just tell it what kind of wave you want, and then let it run. It'll then output an oscillation until you tell it to stop. This way, you free the main processor from the need to constantly be writing to a DAC.
Now, if I understand what you've said correctly, all the slave select input on each slave is looking for is a high signal? And in my GPIO out, I'm just telling the corresponding pin in software to go high? It's like I'm passing a baton around permitting one slave at a time to talk/listen to the master... That seems fairly straight forward to code. This sounds much easier than trying to daisy chain them. Thanks so much!
all the slave select input on each slave is looking for is a high signal
Slaves are usually active LOW, i.e. nCS0, nCS1, etc. See this: www.totalphase.com/.../ and/or: en.wikipedia.org/.../Serial_Peripheral_Interface_Bus For more, google: "SPI bus protocol".
Thanks. That sounds okay. But in any case, it's as simple as one line of code to select a slave, then transmit to it, and deselect it (by bringing that SS high?). I read through the links and that makes sense. But then I have another (related) question about that. My DAC chip has a 3-wire SPI interface. I get my clock in and DIN. However, I have my sync line (I assume that acts as my SS). However, it's a /sync line (as in sync-bar). What does this mean? Does this mean this chip is expecting a high signal? I believe the DDS I'm also putting on here denotes its pin by (non-bar) "FSYNC". Once my DAC chip comes in, and it's all soldered down, then I need to start figuring out the code side...
Ha, we'll see. Thanks.
If you see a signal named /reset or /select or whatever, that / signifies that the signal has inverted logic, i.e. that it is active low.
Okay! Thank you so much for your help. You guys are great. I'm sure I'll get stuck again when I have to actually install these chips. Thanks again.