This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

I/O Ports & SPI bus on c8051f120

Hello,
I've configured SPI bus on P0.2 (SCLK), P0.3(MISO), P0.4 (MOSI) and P0.5 (NSS) but on these ports: no signal. Normaly, I should have SPI clock at least but I have nothing.

I've configured :

1) Pins:

sbit SPI_SCLK=P0^2;     // SPI clock on P0.2
sbit SPI_MISO=P0^3;     // Master In/Slave Out on P0.3
sbit SPI_MOSI=P0^4;     // Master Out/Slave In on P0.4
sbit SPI_NSS=P0^5;      // Slave Select on P0.5

2) Ports:

void port_init (void)
{
         char sfrpage_save = SFRPAGE;     // Save current page of SFR

     SFRPAGE = CONFIG_PAGE;           // Load config_page

         WDTCN = 0xde;
         WDTCN = 0xad;                    // Disable watchdog timer

     XBR0 = 0x02;          // Enable SPI bus
     XBR1 = 0x00;          // Enable /INT0 and /INT1
     XBR2 = 0x40;          // Enable Crossbar and weak pull-up

         P0MDOUT |= 0x3C;          // P0.5, P0.4, P0.3 and P0.2 are outputs (for SPI datas)
         P0 = 0x3C;

     SFRPAGE = sfrpage_save;          // Restore SFR page
}

3) SPI bus:

void config_SPI (void)
{
     char sfrpage_save = SFRPAGE;     // Save current SFR page

     SFRPAGE = SPI0_PAGE;             // Load SPI page

     SPI0CFG |= 0x40;                 // Master Mode Enable
     SPI0CN  |= 0x8D;                 // Slave select and enable SPI
     SPI0CKR  = 0x01;                 // SYSCLK/2

     SFRPAGE = sfrpage_save;          // Restore SFR page

}

I have tried many times to resolve the problem but without satisfaction for the moment.

If you can help me, make it please.
Thanks.

Manu

Parents
  •      XBR0            = 0x06;          // Enable SPI bus
         XBR1            = 0x14;          // Enable /INT0 and /INT1
         XBR2            = 0x40;          // Enable Crossbar and weak pull-up
         P0MDOUT         = 0x38;          // P0.5, P0.4, P0.3 and P0.2 are outputs (for SPI datas
    

    PLEASE do not comment incorrectly, I were just about to post "your pinnings are wrong' when I realized that

    XBR0            = 0x06;          // Enable SPI bus
    is
    XBR0            = 0x06;          // Enable UART0 and SPI bus
    

    some of us will gladly help you, but if you make it more difficult to help you than need be such help will soon fade away.

    Now, if you read the datasheet very carefully, you will find a little well hidden nugget which is that SPI must be initialized before the crossbar, since SPI init is the only place the (non)existence of NSS is known.

    Erik

Reply
  •      XBR0            = 0x06;          // Enable SPI bus
         XBR1            = 0x14;          // Enable /INT0 and /INT1
         XBR2            = 0x40;          // Enable Crossbar and weak pull-up
         P0MDOUT         = 0x38;          // P0.5, P0.4, P0.3 and P0.2 are outputs (for SPI datas
    

    PLEASE do not comment incorrectly, I were just about to post "your pinnings are wrong' when I realized that

    XBR0            = 0x06;          // Enable SPI bus
    is
    XBR0            = 0x06;          // Enable UART0 and SPI bus
    

    some of us will gladly help you, but if you make it more difficult to help you than need be such help will soon fade away.

    Now, if you read the datasheet very carefully, you will find a little well hidden nugget which is that SPI must be initialized before the crossbar, since SPI init is the only place the (non)existence of NSS is known.

    Erik

Children
No data