Hello.
I am curious why there is a limitation of 64k on the C251 compiler, when the device can handle up to 256k? Is there a way around this?
I found this curious, seeing that there are 18 address lines available on the C251. as usual the OP does not bother to fully state which device he uses, but believes that a generic name will suffice.
I took a quick gander at a 251 device ind it does not have more than 16 address bits.
Erik
I am using an Intel 80C251. It is possible to address external ROM up to 256k,which requires 18 address lines. However, my documentation that accompanies the compiler clearly states that code larger than 64k is not supported. I found information elsewhere on the website referring to bank switching, however my version of the compiler (v2) does not allow me to do so, as it does not support it. I will motivate within the company to upgrade the license. I managed to find the answer that I was looking for, so there is no need to be rude or sarcastic, Erik.
I am using an Intel 80C251 That begs the question: why are you using a discontinued chip
what is 'sarcastic' in my reply???
The 251 is today available as IP Core. Therefore many companies are designing their 'own' device using this core.
The 251 supports a linar memory up to 16MB. This is also supported by the C251 Compiler with the far and huge memory types.
More information: http://www.keil.com/support/man/docs/c251/c251_le_memtypes.htm
"my version of the compiler (v2)"
So, not only did you fail to mention which device you were using, but also which version of the tools - and that was central to your question!