First of all I'm using STR735
The start-up code enters the Supervisor Mode, sets up the stack pointer followed by the User Mode seting up the stack pointer; then jumps to main.
Im my application I need to disable interrupts during critical memcpy's and also during Maxim 1-wire communication. This is a lengthy process in user mode but quit straight forward in supervisor mode.
My question is WHY the start-up code is entering user mode for my single user embedded processor? If I comment out switching to User Mode, what issues would I encounter? I am not using any OS.
Barry
EIC->ICR &= ~0x0001;
should disable all IRQ interrupts. Make it ~0x0003 if you also want FIQ interrupts. That is not what I would call lengthy. (you may need to add a few NOP's if EIC is running on a slower clock than the CPU, but it is probably not)
If you really want to you should be able to run in Supervisor Mode (Or System mode, which I beleive the STR73X has), but I don't think there is much need.
Interrupts can only be disabled in the Supervisor Mode. There are two interrupt bits located in the lower byte of CPSR which cannot be changed in user mode.
In user mode, a Software Interrupt would have to be issued. In the handler, CPSR could then be changed to Supervisor Mode; then the interrupt bits could be changed; User Mode could then be re-entered followed by a return from interrrupt.
You can only set the CPSR in Priviledged mode as you say. The EIC on the other hand is a memory mappded device that may be written in any mode, including USER. All interrupts come through the EIC, therfore disabling the interrupts in the EIC disables them from the ARM.
I originally disabled it that way. But there is a problem in the ST ARM. Extra interrupts were being asserted in both the timer and external interrupts. When the interrupt returned from being serviced an extra interrupt was being asserted. For the external interrupt this was occurring approximately 0.8 percent of the time. It was approximately the same for the timer interrupts.
Disabling the function call to perform the EIC enable/disable resolved the problem. The ST Engineer inform me that there is a problem disabling interrupts in the EIC and suggest that I perform it in the CPSR.
If you really want to you should be able to run in Supervisor Mode (Or System mode, which I beleive the STR73X has)
There should be no problem with this if you are not user the Real-Time library. If you use the Real_Time Library, you may just use tsk_lock() and tsk_unlock() (which will disable the EIC from an SWI routine)
Declare your critical functions as __swi functions. They execute in supervisor mode and can not be interrupted by an IRQ interrupt. You need to add a SWI.s handler to your project.
See the SWI example located under: \Keil\ARM\Examples\SWI folder.
Franc