Hello all, Ok, I guess I'm doing something wrong but I just don't see what it is! I configure my UART like this:
/* UART1 configured as follow: - Word Length = 8 Bits - One Stop Bit - No parity - BaudRate = 115200 baud - no Hardware flow control enabled (RTS and CTS signals) - Receive and transmit enabled - Receive and transmit FIFOs are enabled - Transmit and Receive FIFOs levels have 8 bytes depth */ UART_InitStructure.UART_WordLength = UART_WordLength_8D; UART_InitStructure.UART_StopBits = UART_StopBits_1; UART_InitStructure.UART_Parity = UART_Parity_No ; UART_InitStructure.UART_BaudRate = 115200; UART_InitStructure.UART_HardwareFlowControl = UART_HardwareFlowControl_None; UART_InitStructure.UART_Mode = UART_Mode_Tx_Rx; UART_InitStructure.UART_FIFO = UART_FIFO_Disable;//UART_FIFO_Enable; UART_InitStructure.UART_TxFIFOLevel = UART_FIFOLevel_1_2; /* FIFO size 16 bytes, FIFO level 8 bytes */ UART_InitStructure.UART_RxFIFOLevel = UART_FIFOLevel_1_2; /* FIFO size 16 bytes, FIFO level 8 bytes */ UART_DeInit(UART1); UART_Init(UART1, &UART_InitStructure); UART_LoopBackConfig(UART1, ENABLE) ; /* Enable the UART1 */ UART_Cmd(UART1, ENABLE); /* Enable UART1 Rx Interrupt */ UART_ITConfig(UART1, UART_IT_Receive, ENABLE); /* Clear IRQ MAsk */ UART_ClearITPendingBit(UART1, UART_IT_Receive);
nice and easy. Now, note that the loopback is enabled. I transmit a single character and indeed, the ISR is invoke not once - but as long as the simulator runs), delivering the exact same character! This is the ISR:
unsigned x = UART1->DR ; VIC0->VAR = 0 ; VIC1->VAR = 0 ; UART_ClearITPendingBit(UART1, UART_IT_Receive) ;
do you a clue what's wrong?
What chip are you using ?
Some have interrupt controllers that require certain procedures to finish an interrupt - clearing the appropriate bit will not work.
Christoph, Thanks for your reply. It is a STR9. I see that even when the receive queue is totally emptied, the core is still interrupted by the UART. I just don't get it!
Greetings, Tamir
All goes well until the first RX interrupt is generated (if the firmware is requirest to interupt the processor at 1/8 full, this will happen after 2 characters). then, my processor is hogged that much that the main loop is never executed again.
I just don't get it!
I see one thing about the code that's a bit odd - the writes to VIC_VARx.
Do you really need to write to both of them ?
Also, are you sure that writing to VIC_VARx doesn't actually end the interrupt routine (I can only speculate, but the interrupt controller on the AT91SAM7S I'm working with works this way). If it did, your code would not clear the UARTs interrupt pending flag.
Try writing to only one of the VIC_VARx registers (the one that's actually responsible for the UART), and do so as the last instruction of the ISR.
Christoph, I did to no avail. the less funny part is that even if I disable the loopback bit through the simulator, IRQs continue to be generated ?!
Christoph, I am clearly not clearing the interupt. I know this because I stopped the affair with the loopback and replaced it with a SIGNAL function, with the same results - CPU hugged by UART interrupts. I checked out the code sample for the ST comstick which is also STR9 based, but I really don't see the problem. I even used their CPU/UART configuration, just to end up with the same result...very frustrating.
Hi! I tried to compile your program with compiler but it gave up with macro "RRF"(need more argument). I have another "RS232 echo" program(9600 baud, johnny) that is somewhat easier. sam_des says he use Jen's editor, but I don't like that. Maybe the fault is there. You'll find the "RELOC.INC" in the CC5 folder and the linker script for code/LKR
well, well... I'll take the time(sometime) to put inline asm in the main module since the linkerscript needs modifying when it comes to interrupt, and I really don't know how to modify the *.inc files. and send code back to you